62 class ARMDAGToDAGISel : public SelectionDAGISel {  class
68   explicit ARMDAGToDAGISel(ARMBaseTargetMachine &tm, CodeGenOpt::Level OptLevel)  in ARMDAGToDAGISel()  function in __anon6bce5c5f0111::ARMDAGToDAGISel
325 void ARMDAGToDAGISel::PreprocessISelDAG() {  in PreprocessISelDAG()
409 bool ARMDAGToDAGISel::hasNoVMLxHazardUse(SDNode *N) const {  in hasNoVMLxHazardUse()
455 bool ARMDAGToDAGISel::isShifterOpProfitable(const SDValue &Shift,  in isShifterOpProfitable()
467 bool ARMDAGToDAGISel::SelectImmShifterOperand(SDValue N,  in SelectImmShifterOperand()
490 bool ARMDAGToDAGISel::SelectRegShifterOperand(SDValue N,  in SelectRegShifterOperand()
518 bool ARMDAGToDAGISel::SelectAddrModeImm12(SDValue N,  in SelectAddrModeImm12()
567 bool ARMDAGToDAGISel::SelectLdStSOReg(SDValue N, SDValue &Base, SDValue &Offset,  in SelectLdStSOReg()
664 AddrMode2Type ARMDAGToDAGISel::SelectAddrMode2Worker(SDValue N,  in SelectAddrMode2Worker()
799 bool ARMDAGToDAGISel::SelectAddrMode2OffsetReg(SDNode *Op, SDValue N,  in SelectAddrMode2OffsetReg()
835 bool ARMDAGToDAGISel::SelectAddrMode2OffsetImmPre(SDNode *Op, SDValue N,  in SelectAddrMode2OffsetImmPre()
855 bool ARMDAGToDAGISel::SelectAddrMode2OffsetImm(SDNode *Op, SDValue N,  in SelectAddrMode2OffsetImm()
875 bool ARMDAGToDAGISel::SelectAddrOffsetNone(SDValue N, SDValue &Base) {  in SelectAddrOffsetNone()
880 bool ARMDAGToDAGISel::SelectAddrMode3(SDValue N,  in SelectAddrMode3()
928 bool ARMDAGToDAGISel::SelectAddrMode3Offset(SDNode *Op, SDValue N,  in SelectAddrMode3Offset()
948 bool ARMDAGToDAGISel::SelectAddrMode5(SDValue N,  in SelectAddrMode5()
990 bool ARMDAGToDAGISel::SelectAddrMode6(SDNode *Parent, SDValue N, SDValue &Addr,  in SelectAddrMode6()
1019 bool ARMDAGToDAGISel::SelectAddrMode6Offset(SDNode *Op, SDValue N,  in SelectAddrMode6Offset()
1033 bool ARMDAGToDAGISel::SelectAddrModePC(SDValue N,  in SelectAddrModePC()
1051 bool ARMDAGToDAGISel::SelectThumbAddrModeRR(SDValue N,  in SelectThumbAddrModeRR()
1068 ARMDAGToDAGISel::SelectThumbAddrModeRI(SDValue N, SDValue &Base,  in SelectThumbAddrModeRI()
1103 ARMDAGToDAGISel::SelectThumbAddrModeRI5S1(SDValue N,  in SelectThumbAddrModeRI5S1()
1110 ARMDAGToDAGISel::SelectThumbAddrModeRI5S2(SDValue N,  in SelectThumbAddrModeRI5S2()
1117 ARMDAGToDAGISel::SelectThumbAddrModeRI5S4(SDValue N,  in SelectThumbAddrModeRI5S4()
1124 ARMDAGToDAGISel::SelectThumbAddrModeImm5S(SDValue N, unsigned Scale,  in SelectThumbAddrModeImm5S()
1179 ARMDAGToDAGISel::SelectThumbAddrModeImm5S4(SDValue N, SDValue &Base,  in SelectThumbAddrModeImm5S4()
1185 ARMDAGToDAGISel::SelectThumbAddrModeImm5S2(SDValue N, SDValue &Base,  in SelectThumbAddrModeImm5S2()
1191 ARMDAGToDAGISel::SelectThumbAddrModeImm5S1(SDValue N, SDValue &Base,  in SelectThumbAddrModeImm5S1()
1196 bool ARMDAGToDAGISel::SelectThumbAddrModeSP(SDValue N,  in SelectThumbAddrModeSP()
1243 bool ARMDAGToDAGISel::SelectT2ShifterOperandReg(SDValue N, SDValue &BaseReg,  in SelectT2ShifterOperandReg()
1265 bool ARMDAGToDAGISel::SelectT2AddrModeImm12(SDValue N,  in SelectT2AddrModeImm12()
1317 bool ARMDAGToDAGISel::SelectT2AddrModeImm8(SDValue N,  in SelectT2AddrModeImm8()
1343 bool ARMDAGToDAGISel::SelectT2AddrModeImm8Offset(SDNode *Op, SDValue N,  in SelectT2AddrModeImm8Offset()
1360 bool ARMDAGToDAGISel::SelectT2AddrModeSoReg(SDValue N,  in SelectT2AddrModeSoReg()
1407 bool ARMDAGToDAGISel::SelectT2AddrModeExclusive(SDValue N, SDValue &Base,  in SelectT2AddrModeExclusive()
1442 SDNode *ARMDAGToDAGISel::SelectARMIndexedLoad(SDNode *N) {  in SelectARMIndexedLoad()
1515 SDNode *ARMDAGToDAGISel::SelectT2IndexedLoad(SDNode *N) {  in SelectT2IndexedLoad()
1564 SDNode *ARMDAGToDAGISel::createGPRPairNode(EVT VT, SDValue V0, SDValue V1) {  in createGPRPairNode()
1575 SDNode *ARMDAGToDAGISel::createSRegPairNode(EVT VT, SDValue V0, SDValue V1) {  in createSRegPairNode()
1586 SDNode *ARMDAGToDAGISel::createDRegPairNode(EVT VT, SDValue V0, SDValue V1) {  in createDRegPairNode()
1596 SDNode *ARMDAGToDAGISel::createQRegPairNode(EVT VT, SDValue V0, SDValue V1) {  in createQRegPairNode()
1606 SDNode *ARMDAGToDAGISel::createQuadSRegsNode(EVT VT, SDValue V0, SDValue V1,  in createQuadSRegsNode()
1621 SDNode *ARMDAGToDAGISel::createQuadDRegsNode(EVT VT, SDValue V0, SDValue V1,  in createQuadDRegsNode()
1635 SDNode *ARMDAGToDAGISel::createQuadQRegsNode(EVT VT, SDValue V0, SDValue V1,  in createQuadQRegsNode()
1651 SDValue ARMDAGToDAGISel::GetVLDSTAlign(SDValue Align, unsigned NumVecs,  in GetVLDSTAlign()
1772 SDNode *ARMDAGToDAGISel::SelectVLD(SDNode *N, bool isUpdating, unsigned NumVecs,  in SelectVLD()
1905 SDNode *ARMDAGToDAGISel::SelectVST(SDNode *N, bool isUpdating, unsigned NumVecs,  in SelectVST()
2052 SDNode *ARMDAGToDAGISel::SelectVLDSTLane(SDNode *N, bool IsLoad,  in SelectVLDSTLane()
2171 SDNode *ARMDAGToDAGISel::SelectVLDDup(SDNode *N, bool isUpdating,  in SelectVLDDup()
2254 SDNode *ARMDAGToDAGISel::SelectVTBL(SDNode *N, bool IsExt, unsigned NumVecs,  in SelectVTBL()
2287 SDNode *ARMDAGToDAGISel::SelectV6T2BitfieldExtractOp(SDNode *N,  in SelectV6T2BitfieldExtractOp()
2398 SDNode *ARMDAGToDAGISel::SelectABSOp(SDNode *N){  in SelectABSOp()
2427 SDNode *ARMDAGToDAGISel::SelectConcatVector(SDNode *N) {  in SelectConcatVector()
2436 SDNode *ARMDAGToDAGISel::Select(SDNode *N) {  in Select()
3321 SDNode *ARMDAGToDAGISel::SelectInlineAsm(SDNode *N){  in SelectInlineAsm()
3474 bool ARMDAGToDAGISel::
3491   return new ARMDAGToDAGISel(TM, OptLevel);  in createARMISelDag()