Lines Matching refs:BUILD_VECTOR
119 setOperationAction(ISD::BUILD_VECTOR, VT, Custom); in addTypeForNEON()
564 setTargetDAGCombine(ISD::BUILD_VECTOR); in ARMTargetLowering()
1109 case ARMISD::BUILD_VECTOR: return "ARMISD::BUILD_VECTOR"; in getTargetNodeName()
5118 SDValue Val = DAG.getNode(ISD::BUILD_VECTOR, dl, VecVT, Ops); in LowerBUILD_VECTOR()
5154 SDValue Val = DAG.getNode(ARMISD::BUILD_VECTOR, dl, VecVT, Ops); in LowerBUILD_VECTOR()
5461 DAG.getNode(ISD::BUILD_VECTOR, DL, MVT::v8i8, VTBLMask)); in LowerVECTOR_SHUFFLEv8i8()
5464 DAG.getNode(ISD::BUILD_VECTOR, DL, MVT::v8i8, VTBLMask)); in LowerVECTOR_SHUFFLEv8i8()
5513 if (Lane == 0 && V1.getOpcode() == ISD::BUILD_VECTOR && in LowerVECTOR_SHUFFLE()
5617 SDValue Val = DAG.getNode(ARMISD::BUILD_VECTOR, dl, VecVT, Ops); in LowerVECTOR_SHUFFLE()
5688 BVN->getOpcode() != ISD::BUILD_VECTOR) in isExtendedBUILD_VECTOR()
5709 if (N->getOpcode() != ISD::BUILD_VECTOR) in isExtendedBUILD_VECTOR()
5833 assert(BVN->getOpcode() == ISD::BUILD_VECTOR && in SkipExtensionForVMULL()
5836 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N), MVT::v2i32, in SkipExtensionForVMULL()
5840 assert(N->getOpcode() == ISD::BUILD_VECTOR && "expected BUILD_VECTOR"); in SkipExtensionForVMULL()
5853 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N), in SkipExtensionForVMULL()
5974 Y = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32, Y, Y, Y, Y); in LowerSDIV_v4i8()
6010 N1 = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32, N1, N1, N1, N1); in LowerSDIV_v4i16()
6119 N1 = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32, N1, N1, N1, N1); in LowerUDIV()
6307 case ISD::BUILD_VECTOR: return LowerBUILD_VECTOR(Op, DAG, Subtarget); in LowerOperation()
7761 || N0.getOpcode() != ISD::BUILD_VECTOR in AddCombineToVPADDL()
7762 || N1.getOpcode() != ISD::BUILD_VECTOR) in AddCombineToVPADDL()
8572 SDValue BV = DAG.getNode(ISD::BUILD_VECTOR, dl, FloatVT, Ops); in PerformBUILD_VECTORCombine()
9285 if (ConstVec.getOpcode() != ISD::BUILD_VECTOR || in PerformVCVTCombine()
9338 if (ConstVec.getOpcode() != ISD::BUILD_VECTOR || in PerformVDIVCombine()
9809 case ISD::BUILD_VECTOR: return PerformBUILD_VECTORCombine(N, DCI, Subtarget); in PerformDAGCombine()
9830 case ARMISD::BUILD_VECTOR: in PerformDAGCombine()