Lines Matching refs:StVal
8927 SDValue &StVal = Ops[Ops.size()-2]; in CombineBaseUpdate() local
8928 StVal = DAG.getNode(ISD::BITCAST, SDLoc(N), AlignedVecTy, StVal); in CombineBaseUpdate()
9100 SDValue StVal = St->getValue(); in PerformSTORECombine() local
9101 EVT VT = StVal.getValueType(); in PerformSTORECombine()
9127 SDValue WideVec = DAG.getNode(ISD::BITCAST, DL, WideVecVT, StVal); in PerformSTORECombine()
9182 if (StVal.getNode()->getOpcode() == ARMISD::VMOVDRR && in PerformSTORECombine()
9183 StVal.getNode()->hasOneUse()) { in PerformSTORECombine()
9189 StVal.getNode()->getOperand(isBigEndian ? 1 : 0 ), in PerformSTORECombine()
9196 StVal.getNode()->getOperand(isBigEndian ? 0 : 1), in PerformSTORECombine()
9202 if (StVal.getValueType() == MVT::i64 && in PerformSTORECombine()
9203 StVal.getNode()->getOpcode() == ISD::EXTRACT_VECTOR_ELT) { in PerformSTORECombine()
9208 SDLoc dl(StVal); in PerformSTORECombine()
9209 SDValue IntVec = StVal.getOperand(0); in PerformSTORECombine()
9214 Vec, StVal.getOperand(1)); in PerformSTORECombine()