Lines Matching refs:VReg1
6605 unsigned VReg1 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
6606 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::t2MOVi16), VReg1) in EmitSjLjDispatchBlock()
6609 unsigned VReg2 = VReg1; in EmitSjLjDispatchBlock()
6613 .addReg(VReg1) in EmitSjLjDispatchBlock()
6667 unsigned VReg1 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
6669 .addReg(VReg1, RegState::Define) in EmitSjLjDispatchBlock()
6673 .addReg(VReg1)); in EmitSjLjDispatchBlock()
6733 unsigned VReg1 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
6734 AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::MOVi16), VReg1) in EmitSjLjDispatchBlock()
6737 unsigned VReg2 = VReg1; in EmitSjLjDispatchBlock()
6741 .addReg(VReg1) in EmitSjLjDispatchBlock()
6759 unsigned VReg1 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
6761 .addReg(VReg1, RegState::Define) in EmitSjLjDispatchBlock()
6766 .addReg(VReg1, RegState::Kill)); in EmitSjLjDispatchBlock()