Lines Matching refs:no_shift
1119 return Kind == k_PostIndexRegister && PostIdxReg.ShiftTy ==ARM_AM::no_shift; in isPostIdxReg()
1226 if (Memory.ShiftType != ARM_AM::no_shift) return false; in isAddrMode3()
1240 return PostIdxReg.ShiftTy == ARM_AM::no_shift; in isAM3Offset()
1265 Memory.ShiftType != ARM_AM::no_shift || Memory.Alignment != 0) in isMemTBB()
1286 if (Memory.ShiftType == ARM_AM::no_shift) in isT2MemRegOffset()
1296 Memory.ShiftType != ARM_AM::no_shift || Memory.Alignment != 0) in isMemThumbRR()
2126 Val = ARM_AM::getAM2Opc(AddSub, Val, ARM_AM::no_shift); in addAddrMode2Operands()
2147 Val = ARM_AM::getAM2Opc(AddSub, Val, ARM_AM::no_shift); in addAM2OffsetImmOperands()
2890 if (PostIdxReg.ShiftTy != ARM_AM::no_shift) in print()
3063 .Default(ARM_AM::no_shift); in tryParseShiftRegister()
3065 if (ShiftTy == ARM_AM::no_shift) in tryParseShiftRegister()
4604 ARM_AM::ShiftOpc ShiftTy = ARM_AM::no_shift; in parsePostIdxReg()
4686 Operands.push_back(ARMOperand::CreatePostIdxReg(Reg, isAdd, ARM_AM::no_shift, in parseAM3Offset()
4795 ARM_AM::no_shift, 0, 0, false, in parseMemory()
4852 ARM_AM::no_shift, 0, Align, in parseMemory()
4901 ARM_AM::no_shift, 0, 0, in parseMemory()
4930 ARM_AM::ShiftOpc ShiftType = ARM_AM::no_shift; in parseMemory()