1152   ARM_AM::ShiftOpc Shift = ARM_AM::lsl;  in DecodeSORegImmOperand()
1155       Shift = ARM_AM::lsl;  in DecodeSORegImmOperand()
1158       Shift = ARM_AM::lsr;  in DecodeSORegImmOperand()
1161       Shift = ARM_AM::asr;  in DecodeSORegImmOperand()
1164       Shift = ARM_AM::ror;  in DecodeSORegImmOperand()
1168   if (Shift == ARM_AM::ror && imm == 0)  in DecodeSORegImmOperand()
1169     Shift = ARM_AM::rrx;  in DecodeSORegImmOperand()
1191   ARM_AM::ShiftOpc Shift = ARM_AM::lsl;  in DecodeSORegRegOperand()
1194       Shift = ARM_AM::lsl;  in DecodeSORegRegOperand()
1197       Shift = ARM_AM::lsr;  in DecodeSORegRegOperand()
1200       Shift = ARM_AM::asr;  in DecodeSORegRegOperand()
1203       Shift = ARM_AM::ror;  in DecodeSORegRegOperand()
1419       imm = ARM_AM::getAM5Opc(U ? ARM_AM::add : ARM_AM::sub, imm);  in DecodeCopMemInstruction()
1528   ARM_AM::AddrOpc Op = ARM_AM::add;  in DecodeAddrMode2IdxInstruction()
1530     Op = ARM_AM::sub;  in DecodeAddrMode2IdxInstruction()
1545     ARM_AM::ShiftOpc Opc = ARM_AM::lsl;  in DecodeAddrMode2IdxInstruction()
1548         Opc = ARM_AM::lsl;  in DecodeAddrMode2IdxInstruction()
1551         Opc = ARM_AM::lsr;  in DecodeAddrMode2IdxInstruction()
1554         Opc = ARM_AM::asr;  in DecodeAddrMode2IdxInstruction()
1557         Opc = ARM_AM::ror;  in DecodeAddrMode2IdxInstruction()
1563     if (Opc == ARM_AM::ror && amt == 0)  in DecodeAddrMode2IdxInstruction()
1564       Opc = ARM_AM::rrx;  in DecodeAddrMode2IdxInstruction()
1565     unsigned imm = ARM_AM::getAM2Opc(Op, amt, Opc, idx_mode);  in DecodeAddrMode2IdxInstruction()
1570     unsigned tmp = ARM_AM::getAM2Opc(Op, imm, ARM_AM::lsl, idx_mode);  in DecodeAddrMode2IdxInstruction()
1590   ARM_AM::ShiftOpc ShOp = ARM_AM::lsl;  in DecodeSORegMemOperand()
1593       ShOp = ARM_AM::lsl;  in DecodeSORegMemOperand()
1596       ShOp = ARM_AM::lsr;  in DecodeSORegMemOperand()
1599       ShOp = ARM_AM::asr;  in DecodeSORegMemOperand()
1602       ShOp = ARM_AM::ror;  in DecodeSORegMemOperand()
1606   if (ShOp == ARM_AM::ror && imm == 0)  in DecodeSORegMemOperand()
1607     ShOp = ARM_AM::rrx;  in DecodeSORegMemOperand()
1615     shift = ARM_AM::getAM2Opc(ARM_AM::add, imm, ShOp);  in DecodeSORegMemOperand()
1617     shift = ARM_AM::getAM2Opc(ARM_AM::sub, imm, ShOp);  in DecodeSORegMemOperand()
1824       mode = ARM_AM::da;  in DecodeRFEInstruction()
1827       mode = ARM_AM::ia;  in DecodeRFEInstruction()
1830       mode = ARM_AM::db;  in DecodeRFEInstruction()
1833       mode = ARM_AM::ib;  in DecodeRFEInstruction()
2206     Inst.addOperand(MCOperand::CreateImm(ARM_AM::getAM5Opc(ARM_AM::add, imm)));  in DecodeAddrMode5Operand()
2208     Inst.addOperand(MCOperand::CreateImm(ARM_AM::getAM5Opc(ARM_AM::sub, imm)));  in DecodeAddrMode5Operand()