81   uint32_t getHiLo16ImmOpValue(const MCInst &MI, unsigned OpIdx,
85   bool EncodeAddrModeOpValues(const MCInst &MI, unsigned OpIdx,
92   uint32_t getThumbBLTargetOpValue(const MCInst &MI, unsigned OpIdx,
98   uint32_t getThumbBLXTargetOpValue(const MCInst &MI, unsigned OpIdx,
103   uint32_t getThumbBRTargetOpValue(const MCInst &MI, unsigned OpIdx,
108   uint32_t getThumbBCCTargetOpValue(const MCInst &MI, unsigned OpIdx,
113   uint32_t getThumbCBTargetOpValue(const MCInst &MI, unsigned OpIdx,
119   uint32_t getBranchTargetOpValue(const MCInst &MI, unsigned OpIdx,
125   uint32_t getUnconditionalBranchTargetOpValue(const MCInst &MI, unsigned OpIdx,
131   uint32_t getARMBranchTargetOpValue(const MCInst &MI, unsigned OpIdx,
134   uint32_t getARMBLTargetOpValue(const MCInst &MI, unsigned OpIdx,
137   uint32_t getARMBLXTargetOpValue(const MCInst &MI, unsigned OpIdx,
143   uint32_t getAdrLabelOpValue(const MCInst &MI, unsigned OpIdx,
146   uint32_t getThumbAdrLabelOpValue(const MCInst &MI, unsigned OpIdx,
149   uint32_t getT2AdrLabelOpValue(const MCInst &MI, unsigned OpIdx,
156   uint32_t getAddrModeImm12OpValue(const MCInst &MI, unsigned OpIdx,
161   uint32_t getThumbAddrModeRegRegOpValue(const MCInst &MI, unsigned OpIdx,
167   uint32_t getT2AddrModeImm8s4OpValue(const MCInst &MI, unsigned OpIdx,
173   uint32_t getT2AddrModeImm0_1020s4OpValue(const MCInst &MI, unsigned OpIdx,
179   uint32_t getT2Imm8s4OpValue(const MCInst &MI, unsigned OpIdx,
186   uint32_t getLdStSORegOpValue(const MCInst &MI, unsigned OpIdx,
191   uint32_t getLdStmModeOpValue(const MCInst &MI, unsigned OpIdx,  in getLdStmModeOpValue()  argument
194     ARM_AM::AMSubMode Mode = (ARM_AM::AMSubMode)MI.getOperand(OpIdx).getImm();  in getLdStmModeOpValue()
218   uint32_t getAddrMode2OpValue(const MCInst &MI, unsigned OpIdx,
223   uint32_t getAddrMode2OffsetOpValue(const MCInst &MI, unsigned OpIdx,
228   uint32_t getPostIdxRegOpValue(const MCInst &MI, unsigned OpIdx,
233   uint32_t getAddrMode3OffsetOpValue(const MCInst &MI, unsigned OpIdx,
238   uint32_t getAddrMode3OpValue(const MCInst &MI, unsigned OpIdx,
244   uint32_t getAddrModeThumbSPOpValue(const MCInst &MI, unsigned OpIdx,
249   uint32_t getAddrModeISOpValue(const MCInst &MI, unsigned OpIdx,
254   uint32_t getAddrModePCOpValue(const MCInst &MI, unsigned OpIdx,
259   uint32_t getAddrMode5OpValue(const MCInst &MI, unsigned OpIdx,
558 EncodeAddrModeOpValues(const MCInst &MI, unsigned OpIdx, unsigned &Reg,  in EncodeAddrModeOpValues()  argument
561   const MCOperand &MO  = MI.getOperand(OpIdx);  in EncodeAddrModeOpValues()
562   const MCOperand &MO1 = MI.getOperand(OpIdx + 1);  in EncodeAddrModeOpValues()
587 static uint32_t getBranchTargetOpValue(const MCInst &MI, unsigned OpIdx,  in getBranchTargetOpValue()  argument
591   const MCOperand &MO = MI.getOperand(OpIdx);  in getBranchTargetOpValue()
625 getThumbBLTargetOpValue(const MCInst &MI, unsigned OpIdx,  in getThumbBLTargetOpValue()  argument
628   const MCOperand MO = MI.getOperand(OpIdx);  in getThumbBLTargetOpValue()
630     return ::getBranchTargetOpValue(MI, OpIdx, ARM::fixup_arm_thumb_bl,  in getThumbBLTargetOpValue()
638 getThumbBLXTargetOpValue(const MCInst &MI, unsigned OpIdx,  in getThumbBLXTargetOpValue()  argument
641   const MCOperand MO = MI.getOperand(OpIdx);  in getThumbBLXTargetOpValue()
643     return ::getBranchTargetOpValue(MI, OpIdx, ARM::fixup_arm_thumb_blx,  in getThumbBLXTargetOpValue()
650 getThumbBRTargetOpValue(const MCInst &MI, unsigned OpIdx,  in getThumbBRTargetOpValue()  argument
653   const MCOperand MO = MI.getOperand(OpIdx);  in getThumbBRTargetOpValue()
655     return ::getBranchTargetOpValue(MI, OpIdx, ARM::fixup_arm_thumb_br,  in getThumbBRTargetOpValue()
662 getThumbBCCTargetOpValue(const MCInst &MI, unsigned OpIdx,  in getThumbBCCTargetOpValue()  argument
665   const MCOperand MO = MI.getOperand(OpIdx);  in getThumbBCCTargetOpValue()
667     return ::getBranchTargetOpValue(MI, OpIdx, ARM::fixup_arm_thumb_bcc,  in getThumbBCCTargetOpValue()
674 getThumbCBTargetOpValue(const MCInst &MI, unsigned OpIdx,  in getThumbCBTargetOpValue()  argument
677   const MCOperand MO = MI.getOperand(OpIdx);  in getThumbCBTargetOpValue()
679     return ::getBranchTargetOpValue(MI, OpIdx, ARM::fixup_arm_thumb_cb, Fixups, STI);  in getThumbCBTargetOpValue()
703 getBranchTargetOpValue(const MCInst &MI, unsigned OpIdx,  in getBranchTargetOpValue()  argument
710       ::getBranchTargetOpValue(MI, OpIdx, ARM::fixup_t2_condbranch, Fixups, STI);  in getBranchTargetOpValue()
711   return getARMBranchTargetOpValue(MI, OpIdx, Fixups, STI);  in getBranchTargetOpValue()
717 getARMBranchTargetOpValue(const MCInst &MI, unsigned OpIdx,  in getARMBranchTargetOpValue()  argument
720   const MCOperand MO = MI.getOperand(OpIdx);  in getARMBranchTargetOpValue()
723       return ::getBranchTargetOpValue(MI, OpIdx,  in getARMBranchTargetOpValue()
725     return ::getBranchTargetOpValue(MI, OpIdx,  in getARMBranchTargetOpValue()
733 getARMBLTargetOpValue(const MCInst &MI, unsigned OpIdx,  in getARMBLTargetOpValue()  argument
736   const MCOperand MO = MI.getOperand(OpIdx);  in getARMBLTargetOpValue()
739       return ::getBranchTargetOpValue(MI, OpIdx,   in getARMBLTargetOpValue()
741     return ::getBranchTargetOpValue(MI, OpIdx, ARM::fixup_arm_uncondbl, Fixups, STI);  in getARMBLTargetOpValue()
748 getARMBLXTargetOpValue(const MCInst &MI, unsigned OpIdx,  in getARMBLXTargetOpValue()  argument
751   const MCOperand MO = MI.getOperand(OpIdx);  in getARMBLXTargetOpValue()
753     return ::getBranchTargetOpValue(MI, OpIdx, ARM::fixup_arm_blx, Fixups, STI);  in getARMBLXTargetOpValue()
761 getUnconditionalBranchTargetOpValue(const MCInst &MI, unsigned OpIdx,  in getUnconditionalBranchTargetOpValue()  argument
765   const MCOperand MO = MI.getOperand(OpIdx);  in getUnconditionalBranchTargetOpValue()
768     return ::getBranchTargetOpValue(MI, OpIdx, ARM::fixup_t2_uncondbranch, Fixups, STI);  in getUnconditionalBranchTargetOpValue()
791 getAdrLabelOpValue(const MCInst &MI, unsigned OpIdx,  in getAdrLabelOpValue()  argument
794   const MCOperand MO = MI.getOperand(OpIdx);  in getAdrLabelOpValue()
796     return ::getBranchTargetOpValue(MI, OpIdx, ARM::fixup_arm_adr_pcrel_12,  in getAdrLabelOpValue()
832 getT2AdrLabelOpValue(const MCInst &MI, unsigned OpIdx,  in getT2AdrLabelOpValue()  argument
835   const MCOperand MO = MI.getOperand(OpIdx);  in getT2AdrLabelOpValue()
837     return ::getBranchTargetOpValue(MI, OpIdx, ARM::fixup_t2_adr_pcrel_12,  in getT2AdrLabelOpValue()
852 getThumbAdrLabelOpValue(const MCInst &MI, unsigned OpIdx,  in getThumbAdrLabelOpValue()  argument
855   const MCOperand MO = MI.getOperand(OpIdx);  in getThumbAdrLabelOpValue()
857     return ::getBranchTargetOpValue(MI, OpIdx, ARM::fixup_thumb_adr_pcrel_10,  in getThumbAdrLabelOpValue()
865 getThumbAddrModeRegRegOpValue(const MCInst &MI, unsigned OpIdx,  in getThumbAddrModeRegRegOpValue()  argument
871   const MCOperand &MO1 = MI.getOperand(OpIdx);  in getThumbAddrModeRegRegOpValue()
872   const MCOperand &MO2 = MI.getOperand(OpIdx + 1);  in getThumbAddrModeRegRegOpValue()
880 getAddrModeImm12OpValue(const MCInst &MI, unsigned OpIdx,  in getAddrModeImm12OpValue()  argument
889   const MCOperand &MO = MI.getOperand(OpIdx);  in getAddrModeImm12OpValue()
919     isAdd = EncodeAddrModeOpValues(MI, OpIdx, Reg, Imm12, Fixups, STI);  in getAddrModeImm12OpValue()
932 getT2Imm8s4OpValue(const MCInst &MI, unsigned OpIdx,  in getT2Imm8s4OpValue()  argument
944   int32_t Imm8 = MI.getOperand(OpIdx).getImm();  in getT2Imm8s4OpValue()
964 getT2AddrModeImm8s4OpValue(const MCInst &MI, unsigned OpIdx,  in getT2AddrModeImm8s4OpValue()  argument
973   const MCOperand &MO = MI.getOperand(OpIdx);  in getT2AddrModeImm8s4OpValue()
986     isAdd = EncodeAddrModeOpValues(MI, OpIdx, Reg, Imm8, Fixups, STI);  in getT2AddrModeImm8s4OpValue()
1005 getT2AddrModeImm0_1020s4OpValue(const MCInst &MI, unsigned OpIdx,  in getT2AddrModeImm0_1020s4OpValue()  argument
1010   const MCOperand &MO = MI.getOperand(OpIdx);  in getT2AddrModeImm0_1020s4OpValue()
1011   const MCOperand &MO1 = MI.getOperand(OpIdx + 1);  in getT2AddrModeImm0_1020s4OpValue()
1018 ARMMCCodeEmitter::getHiLo16ImmOpValue(const MCInst &MI, unsigned OpIdx,  in getHiLo16ImmOpValue()  argument
1023   const MCOperand &MO = MI.getOperand(OpIdx);  in getHiLo16ImmOpValue()
1074 getLdStSORegOpValue(const MCInst &MI, unsigned OpIdx,  in getLdStSORegOpValue()  argument
1077   const MCOperand &MO = MI.getOperand(OpIdx);  in getLdStSORegOpValue()
1078   const MCOperand &MO1 = MI.getOperand(OpIdx+1);  in getLdStSORegOpValue()
1079   const MCOperand &MO2 = MI.getOperand(OpIdx+2);  in getLdStSORegOpValue()
1108 getAddrMode2OpValue(const MCInst &MI, unsigned OpIdx,  in getAddrMode2OpValue()  argument
1115   const MCOperand &MO = MI.getOperand(OpIdx);  in getAddrMode2OpValue()
1117   uint32_t Binary = getAddrMode2OffsetOpValue(MI, OpIdx + 1, Fixups, STI);  in getAddrMode2OpValue()
1123 getAddrMode2OffsetOpValue(const MCInst &MI, unsigned OpIdx,  in getAddrMode2OffsetOpValue()  argument
1129   const MCOperand &MO = MI.getOperand(OpIdx);  in getAddrMode2OffsetOpValue()
1130   const MCOperand &MO1 = MI.getOperand(OpIdx+1);  in getAddrMode2OffsetOpValue()
1146 getPostIdxRegOpValue(const MCInst &MI, unsigned OpIdx,  in getPostIdxRegOpValue()  argument
1151   const MCOperand &MO = MI.getOperand(OpIdx);  in getPostIdxRegOpValue()
1152   const MCOperand &MO1 = MI.getOperand(OpIdx+1);  in getPostIdxRegOpValue()
1158 getAddrMode3OffsetOpValue(const MCInst &MI, unsigned OpIdx,  in getAddrMode3OffsetOpValue()  argument
1165   const MCOperand &MO = MI.getOperand(OpIdx);  in getAddrMode3OffsetOpValue()
1166   const MCOperand &MO1 = MI.getOperand(OpIdx+1);  in getAddrMode3OffsetOpValue()
1178 getAddrMode3OpValue(const MCInst &MI, unsigned OpIdx,  in getAddrMode3OpValue()  argument
1186   const MCOperand &MO = MI.getOperand(OpIdx);  in getAddrMode3OpValue()
1187   const MCOperand &MO1 = MI.getOperand(OpIdx+1);  in getAddrMode3OpValue()
1188   const MCOperand &MO2 = MI.getOperand(OpIdx+2);  in getAddrMode3OpValue()
1215 getAddrModeThumbSPOpValue(const MCInst &MI, unsigned OpIdx,  in getAddrModeThumbSPOpValue()  argument
1220   const MCOperand &MO1 = MI.getOperand(OpIdx + 1);  in getAddrModeThumbSPOpValue()
1221   assert(MI.getOperand(OpIdx).getReg() == ARM::SP &&  in getAddrModeThumbSPOpValue()
1231 getAddrModeISOpValue(const MCInst &MI, unsigned OpIdx,  in getAddrModeISOpValue()  argument
1237   const MCOperand &MO = MI.getOperand(OpIdx);  in getAddrModeISOpValue()
1238   const MCOperand &MO1 = MI.getOperand(OpIdx + 1);  in getAddrModeISOpValue()
1246 getAddrModePCOpValue(const MCInst &MI, unsigned OpIdx,  in getAddrModePCOpValue()  argument
1249   const MCOperand MO = MI.getOperand(OpIdx);  in getAddrModePCOpValue()
1251     return ::getBranchTargetOpValue(MI, OpIdx, ARM::fixup_arm_thumb_cp, Fixups, STI);  in getAddrModePCOpValue()
1257 getAddrMode5OpValue(const MCInst &MI, unsigned OpIdx,  in getAddrMode5OpValue()  argument
1266   const MCOperand &MO = MI.getOperand(OpIdx);  in getAddrMode5OpValue()
1283     EncodeAddrModeOpValues(MI, OpIdx, Reg, Imm8, Fixups, STI);  in getAddrMode5OpValue()
1296 getSORegRegOpValue(const MCInst &MI, unsigned OpIdx,  in getSORegRegOpValue()  argument
1309   const MCOperand &MO  = MI.getOperand(OpIdx);  in getSORegRegOpValue()
1310   const MCOperand &MO1 = MI.getOperand(OpIdx + 1);  in getSORegRegOpValue()
1311   const MCOperand &MO2 = MI.getOperand(OpIdx + 2);  in getSORegRegOpValue()
1344 getSORegImmOpValue(const MCInst &MI, unsigned OpIdx,  in getSORegImmOpValue()  argument
1355   const MCOperand &MO  = MI.getOperand(OpIdx);  in getSORegImmOpValue()
1356   const MCOperand &MO1 = MI.getOperand(OpIdx + 1);  in getSORegImmOpValue()
1466 getT2SORegOpValue(const MCInst &MI, unsigned OpIdx,  in getT2SORegOpValue()  argument
1477   const MCOperand &MO  = MI.getOperand(OpIdx);  in getT2SORegOpValue()
1478   const MCOperand &MO1 = MI.getOperand(OpIdx + 1);  in getT2SORegOpValue()