321   MachineBasicBlock *Latch = L->getLoopLatch();  in findInductionRegister()  local
322   if (!Header || !Preheader || !Latch)  in findInductionRegister()
346       if (Phi->getOperand(i+1).getMBB() != Latch)  in findInductionRegister()
369   bool NotAnalyzed = TII->AnalyzeBranch(*Latch, TB, FB, Cond, false);  in findInductionRegister()
450   MachineBasicBlock *Latch = L->getLoopLatch();  in getLoopTripCount()  local
451   if (!Latch)  in getLoopTripCount()
469     else if (MBB == Latch)  in getLoopTripCount()
477   bool NotAnalyzed = TII->AnalyzeBranch(*Latch, TB, FB, Cond, false);  in getLoopTripCount()
1242   MachineBasicBlock *Latch = L->getLoopLatch();  in fixupInductionVariable()  local
1244   if (!Header || !Preheader || !Latch)  in fixupInductionVariable()
1266       if (Phi->getOperand(i+1).getMBB() != Latch)  in fixupInductionVariable()
1293   bool NotAnalyzed = TII->AnalyzeBranch(*Latch, TB, FB, Cond, false);  in fixupInductionVariable()
1414   MachineBasicBlock *Latch = L->getLoopLatch();  in createPreheaderForLoop()  local
1418   if (!Latch || Header->hasAddressTaken())  in createPreheaderForLoop()
1430   if (TII->AnalyzeBranch(*Latch, TB, FB, Tmp1, false))  in createPreheaderForLoop()
1435     if (PB != Latch) {  in createPreheaderForLoop()
1469         if (PredB == Latch)  in createPreheaderForLoop()
1480         if (PredB != Latch) {  in createPreheaderForLoop()
1502         if (MO.getMBB() != Latch)  in createPreheaderForLoop()
1518     if (PB != Latch) {  in createPreheaderForLoop()
1532   bool LatchNotAnalyzed = TII->AnalyzeBranch(*Latch, TB, FB, Tmp2, false);  in createPreheaderForLoop()
1536     TII->InsertBranch(*Latch, Header, nullptr, EmptyCond, DL);  in createPreheaderForLoop()