Lines Matching refs:ISD
67 ISD::ArgFlagsTy ArgFlags, CCState &State);
72 ISD::ArgFlagsTy ArgFlags, CCState &State);
77 ISD::ArgFlagsTy ArgFlags, CCState &State);
82 ISD::ArgFlagsTy ArgFlags, CCState &State);
87 ISD::ArgFlagsTy ArgFlags, CCState &State);
92 ISD::ArgFlagsTy ArgFlags, CCState &State);
97 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_Hexagon_VarArg()
147 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_Hexagon()
191 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_Hexagon32()
209 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_Hexagon64()
234 ISD::ArgFlagsTy ArgFlags, CCState &State) { in RetCC_Hexagon()
271 ISD::ArgFlagsTy ArgFlags, CCState &State) { in RetCC_Hexagon32()
287 ISD::ArgFlagsTy ArgFlags, CCState &State) { in RetCC_Hexagon64()
313 ISD::ArgFlagsTy Flags, SelectionDAG &DAG, in CreateCopyOfByValArgument()
330 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn()
379 SmallVectorImpl<ISD::InputArg> &Ins, in LowerCallResult()
412 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall()
414 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall()
487 ISD::ArgFlagsTy Flags = Outs[i].Flags; in LowerCall()
497 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
500 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
503 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
510 PtrOff = DAG.getNode(ISD::ADD, dl, MVT::i32, StackPtr, PtrOff); in LowerCall()
537 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOpChains); in LowerCall()
632 if (Ptr->getOpcode() != ISD::ADD) in getIndexedAddressParts()
636 isInc = (Ptr->getOpcode() == ISD::ADD); in getIndexedAddressParts()
669 ISD::MemIndexedMode &AM, in getPostIndexedAddressParts()
678 isSEXTLoad = LD->getExtensionType() == ISD::SEXTLOAD; in getPostIndexedAddressParts()
694 AM = isInc ? ISD::POST_INC : ISD::POST_DEC; in getPostIndexedAddressParts()
708 case ISD::INLINEASM: { in LowerINLINEASM()
782 SDValue ShiftIndex = DAG.getNode(ISD::SHL, dl, MVT::i32, Index, in LowerBR_JT()
784 SDValue JTAddress = DAG.getNode(ISD::ADD, dl, MVT::i32, JumpTableBase, in LowerBR_JT()
807 SDValue Sub = DAG.getNode(ISD::SUB, dl, MVT::i32, StackPointer, Size); in LowerDYNAMIC_STACKALLOC()
842 SmallVectorImpl<ISD::InputArg> &Ins, in LowerFormalArguments()
872 ISD::ArgFlagsTy Flags = Ins[i].Flags; in LowerFormalArguments()
933 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOps); in LowerFormalArguments()
973 if (N.getOpcode() == ISD::TRUNCATE && in isSExtFree()
974 N.getOperand(0).getOpcode() == ISD::AssertSext) in isSExtFree()
977 if (N.getOpcode() == ISD::LOAD) in isSExtFree()
990 return DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i64, PopOut); in LowerCTPOP()
999 ISD::CondCode CC = cast<CondCodeSDNode>(Cmp)->get(); in LowerSETCC()
1006 assert(ISD::isSignedIntSetCC(CC) || ISD::isUnsignedIntSetCC(CC)); in LowerSETCC()
1007 unsigned ExtOpc = ISD::isSignedIntSetCC(CC) ? ISD::SIGN_EXTEND in LowerSETCC()
1008 : ISD::ZERO_EXTEND; in LowerSETCC()
1011 SDValue SC = DAG.getNode(ISD::SETCC, dl, MVT::v2i1, LX, RX, Cmp); in LowerSETCC()
1022 if ((CC == ISD::SETEQ || CC == ISD::SETNE) && in LowerSETCC()
1027 LHS = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i32, LHS); in LowerSETCC()
1028 RHS = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i32, RHS); in LowerSETCC()
1029 return DAG.getNode(ISD::SETCC, dl, Op.getValueType(), in LowerSETCC()
1033 LHS = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i32, LHS); in LowerSETCC()
1034 RHS = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i32, RHS); in LowerSETCC()
1035 return DAG.getNode(ISD::SETCC, dl, Op.getValueType(), in LowerSETCC()
1050 SDValue X1 = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::v2i32, Op1); in LowerVSELECT()
1051 SDValue X2 = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::v2i32, Op2); in LowerVSELECT()
1052 SDValue SL = DAG.getNode(ISD::VSELECT, DL, MVT::v2i32, PredOp, X1, X2); in LowerVSELECT()
1053 SDValue TR = DAG.getNode(ISD::TRUNCATE, DL, MVT::v2i16, SL); in LowerVSELECT()
1070 ISD::LoadExtType Ext = LoadNode->getExtensionType(); in LowerLOAD()
1074 if(Ext == ISD::NON_EXTLOAD) in LowerLOAD()
1075 Ext = ISD::ZEXTLOAD; in LowerLOAD()
1089 Ptr = DAG.getNode(ISD::ADD, DL, Base.getValueType(), Base, Increment); in LowerLOAD()
1098 SDValue Tmp1 = DAG.getNode(ISD::SHL, DL, MVT::i32, Loads[1], ShiftAmount); in LowerLOAD()
1099 SDValue Tmp2 = DAG.getNode(ISD::OR, DL, MVT::i32, Tmp1, Loads[0]); in LowerLOAD()
1102 Ptr = DAG.getNode(ISD::ADD, DL, Base.getValueType(), Base, Increment); in LowerLOAD()
1111 Ptr = DAG.getNode(ISD::ADD, DL, Base.getValueType(), Base, Increment); in LowerLOAD()
1119 Tmp1 = DAG.getNode(ISD::SHL, DL, MVT::i32, Loads[3], ShiftAmount); in LowerLOAD()
1120 SDValue Tmp4 = DAG.getNode(ISD::OR, DL, MVT::i32, Tmp1, Loads[2]); in LowerLOAD()
1124 LoadChain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, in LowerLOAD()
1137 Result = DAG.getNode(ISD::BITCAST, DL, VT, Result); in LowerLOAD()
1178 DAG.getNode(ISD::ADD, dl, VT, FrameAddr, Offset), in LowerRETURNADDR()
1233 setOperationAction(ISD::LOAD, VT.getSimpleVT(), Promote); in promoteLdStType()
1234 AddPromotedToType(ISD::LOAD, VT.getSimpleVT(), in promoteLdStType()
1237 setOperationAction(ISD::STORE, VT.getSimpleVT(), Promote); in promoteLdStType()
1238 AddPromotedToType(ISD::STORE, VT.getSimpleVT(), in promoteLdStType()
1282 setOperationAction(ISD::LOAD, MVT::v4i16, Custom); in HexagonTargetLowering()
1283 AddPromotedToType(ISD::LOAD, MVT::v4i16, MVT::i64); in HexagonTargetLowering()
1284 setOperationAction(ISD::STORE, MVT::v4i16, Promote); in HexagonTargetLowering()
1285 AddPromotedToType(ISD::STORE, MVT::v4i16, MVT::i64); in HexagonTargetLowering()
1294 setOperationAction(ISD::SELECT, VT, Expand); in HexagonTargetLowering()
1295 setOperationAction(ISD::SDIV, VT, Expand); in HexagonTargetLowering()
1296 setOperationAction(ISD::SREM, VT, Expand); in HexagonTargetLowering()
1297 setOperationAction(ISD::UDIV, VT, Expand); in HexagonTargetLowering()
1298 setOperationAction(ISD::UREM, VT, Expand); in HexagonTargetLowering()
1299 setOperationAction(ISD::ROTL, VT, Expand); in HexagonTargetLowering()
1300 setOperationAction(ISD::ROTR, VT, Expand); in HexagonTargetLowering()
1301 setOperationAction(ISD::FDIV, VT, Expand); in HexagonTargetLowering()
1302 setOperationAction(ISD::FNEG, VT, Expand); in HexagonTargetLowering()
1303 setOperationAction(ISD::UMUL_LOHI, VT, Expand); in HexagonTargetLowering()
1304 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in HexagonTargetLowering()
1305 setOperationAction(ISD::UDIVREM, VT, Expand); in HexagonTargetLowering()
1306 setOperationAction(ISD::SDIVREM, VT, Expand); in HexagonTargetLowering()
1307 setOperationAction(ISD::FPOW, VT, Expand); in HexagonTargetLowering()
1308 setOperationAction(ISD::CTPOP, VT, Expand); in HexagonTargetLowering()
1309 setOperationAction(ISD::CTLZ, VT, Expand); in HexagonTargetLowering()
1310 setOperationAction(ISD::CTLZ_ZERO_UNDEF, VT, Expand); in HexagonTargetLowering()
1311 setOperationAction(ISD::CTTZ, VT, Expand); in HexagonTargetLowering()
1312 setOperationAction(ISD::CTTZ_ZERO_UNDEF, VT, Expand); in HexagonTargetLowering()
1317 setLoadExtAction(ISD::EXTLOAD, (MVT::SimpleValueType) j, VT, Expand); in HexagonTargetLowering()
1324 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Expand); in HexagonTargetLowering()
1325 setOperationAction(ISD::ConstantPool, VT, Expand); in HexagonTargetLowering()
1326 setOperationAction(ISD::SCALAR_TO_VECTOR, VT, Expand); in HexagonTargetLowering()
1327 setOperationAction(ISD::EXTRACT_VECTOR_ELT, VT, Expand); in HexagonTargetLowering()
1328 setOperationAction(ISD::INSERT_VECTOR_ELT, VT, Expand); in HexagonTargetLowering()
1329 setOperationAction(ISD::BUILD_VECTOR, VT, Expand); in HexagonTargetLowering()
1330 setOperationAction(ISD::EXTRACT_SUBVECTOR, VT, Expand); in HexagonTargetLowering()
1331 setOperationAction(ISD::INSERT_SUBVECTOR, VT, Expand); in HexagonTargetLowering()
1332 setOperationAction(ISD::CONCAT_VECTORS, VT, Expand); in HexagonTargetLowering()
1333 setOperationAction(ISD::SRA, VT, Custom); in HexagonTargetLowering()
1334 setOperationAction(ISD::SHL, VT, Custom); in HexagonTargetLowering()
1335 setOperationAction(ISD::SRL, VT, Custom); in HexagonTargetLowering()
1340 setOperationAction(ISD::ADD, VT, Legal); in HexagonTargetLowering()
1341 setOperationAction(ISD::SUB, VT, Legal); in HexagonTargetLowering()
1342 setOperationAction(ISD::MUL, VT, Legal); in HexagonTargetLowering()
1344 setOperationAction(ISD::BUILD_VECTOR, VT, Custom); in HexagonTargetLowering()
1345 setOperationAction(ISD::EXTRACT_VECTOR_ELT, VT, Custom); in HexagonTargetLowering()
1346 setOperationAction(ISD::INSERT_VECTOR_ELT, VT, Custom); in HexagonTargetLowering()
1347 setOperationAction(ISD::EXTRACT_SUBVECTOR, VT, Custom); in HexagonTargetLowering()
1348 setOperationAction(ISD::INSERT_SUBVECTOR, VT, Custom); in HexagonTargetLowering()
1349 setOperationAction(ISD::CONCAT_VECTORS, VT, Custom); in HexagonTargetLowering()
1352 setOperationAction(ISD::SETCC, MVT::v2i16, Custom); in HexagonTargetLowering()
1353 setOperationAction(ISD::VSELECT, MVT::v2i16, Custom); in HexagonTargetLowering()
1354 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v8i8, Custom); in HexagonTargetLowering()
1355 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v4i16, Custom); in HexagonTargetLowering()
1357 setOperationAction(ISD::ConstantPool, MVT::i32, Custom); in HexagonTargetLowering()
1384 setOperationAction(ISD::SDIV, MVT::i32, Expand); in HexagonTargetLowering()
1386 setOperationAction(ISD::SREM, MVT::i32, Expand); in HexagonTargetLowering()
1389 setOperationAction(ISD::SDIV, MVT::i64, Expand); in HexagonTargetLowering()
1391 setOperationAction(ISD::SREM, MVT::i64, Expand); in HexagonTargetLowering()
1394 setOperationAction(ISD::UDIV, MVT::i32, Expand); in HexagonTargetLowering()
1397 setOperationAction(ISD::UDIV, MVT::i64, Expand); in HexagonTargetLowering()
1400 setOperationAction(ISD::UREM, MVT::i32, Expand); in HexagonTargetLowering()
1403 setOperationAction(ISD::UREM, MVT::i64, Expand); in HexagonTargetLowering()
1406 setOperationAction(ISD::FDIV, MVT::f32, Expand); in HexagonTargetLowering()
1409 setOperationAction(ISD::FDIV, MVT::f64, Expand); in HexagonTargetLowering()
1415 setOperationAction(ISD::FSQRT, MVT::f32, Expand); in HexagonTargetLowering()
1416 setOperationAction(ISD::FSQRT, MVT::f64, Expand); in HexagonTargetLowering()
1417 setOperationAction(ISD::FSIN, MVT::f32, Expand); in HexagonTargetLowering()
1418 setOperationAction(ISD::FSIN, MVT::f64, Expand); in HexagonTargetLowering()
1422 setOperationAction(ISD::FADD, MVT::f32, Legal); in HexagonTargetLowering()
1423 setOperationAction(ISD::FADD, MVT::f64, Expand); in HexagonTargetLowering()
1424 setOperationAction(ISD::FSUB, MVT::f32, Legal); in HexagonTargetLowering()
1425 setOperationAction(ISD::FSUB, MVT::f64, Expand); in HexagonTargetLowering()
1426 setOperationAction(ISD::FMUL, MVT::f64, Expand); in HexagonTargetLowering()
1427 setOperationAction(ISD::FP_EXTEND, MVT::f32, Legal); in HexagonTargetLowering()
1428 setCondCodeAction(ISD::SETOEQ, MVT::f32, Legal); in HexagonTargetLowering()
1429 setCondCodeAction(ISD::SETOEQ, MVT::f64, Legal); in HexagonTargetLowering()
1430 setCondCodeAction(ISD::SETUEQ, MVT::f32, Legal); in HexagonTargetLowering()
1431 setCondCodeAction(ISD::SETUEQ, MVT::f64, Legal); in HexagonTargetLowering()
1433 setCondCodeAction(ISD::SETOGE, MVT::f32, Legal); in HexagonTargetLowering()
1434 setCondCodeAction(ISD::SETOGE, MVT::f64, Legal); in HexagonTargetLowering()
1435 setCondCodeAction(ISD::SETUGE, MVT::f32, Legal); in HexagonTargetLowering()
1436 setCondCodeAction(ISD::SETUGE, MVT::f64, Legal); in HexagonTargetLowering()
1438 setCondCodeAction(ISD::SETOGT, MVT::f32, Legal); in HexagonTargetLowering()
1439 setCondCodeAction(ISD::SETOGT, MVT::f64, Legal); in HexagonTargetLowering()
1440 setCondCodeAction(ISD::SETUGT, MVT::f32, Legal); in HexagonTargetLowering()
1441 setCondCodeAction(ISD::SETUGT, MVT::f64, Legal); in HexagonTargetLowering()
1443 setCondCodeAction(ISD::SETOLE, MVT::f32, Legal); in HexagonTargetLowering()
1444 setCondCodeAction(ISD::SETOLE, MVT::f64, Legal); in HexagonTargetLowering()
1445 setCondCodeAction(ISD::SETOLT, MVT::f32, Legal); in HexagonTargetLowering()
1446 setCondCodeAction(ISD::SETOLT, MVT::f64, Legal); in HexagonTargetLowering()
1448 setOperationAction(ISD::ConstantFP, MVT::f32, Legal); in HexagonTargetLowering()
1449 setOperationAction(ISD::ConstantFP, MVT::f64, Legal); in HexagonTargetLowering()
1451 setOperationAction(ISD::FP_TO_UINT, MVT::i1, Promote); in HexagonTargetLowering()
1452 setOperationAction(ISD::FP_TO_SINT, MVT::i1, Promote); in HexagonTargetLowering()
1453 setOperationAction(ISD::UINT_TO_FP, MVT::i1, Promote); in HexagonTargetLowering()
1454 setOperationAction(ISD::SINT_TO_FP, MVT::i1, Promote); in HexagonTargetLowering()
1456 setOperationAction(ISD::FP_TO_UINT, MVT::i8, Promote); in HexagonTargetLowering()
1457 setOperationAction(ISD::FP_TO_SINT, MVT::i8, Promote); in HexagonTargetLowering()
1458 setOperationAction(ISD::UINT_TO_FP, MVT::i8, Promote); in HexagonTargetLowering()
1459 setOperationAction(ISD::SINT_TO_FP, MVT::i8, Promote); in HexagonTargetLowering()
1461 setOperationAction(ISD::FP_TO_UINT, MVT::i16, Promote); in HexagonTargetLowering()
1462 setOperationAction(ISD::FP_TO_SINT, MVT::i16, Promote); in HexagonTargetLowering()
1463 setOperationAction(ISD::UINT_TO_FP, MVT::i16, Promote); in HexagonTargetLowering()
1464 setOperationAction(ISD::SINT_TO_FP, MVT::i16, Promote); in HexagonTargetLowering()
1466 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Legal); in HexagonTargetLowering()
1467 setOperationAction(ISD::FP_TO_SINT, MVT::i32, Legal); in HexagonTargetLowering()
1468 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Legal); in HexagonTargetLowering()
1469 setOperationAction(ISD::SINT_TO_FP, MVT::i32, Legal); in HexagonTargetLowering()
1471 setOperationAction(ISD::FP_TO_UINT, MVT::i64, Legal); in HexagonTargetLowering()
1472 setOperationAction(ISD::FP_TO_SINT, MVT::i64, Legal); in HexagonTargetLowering()
1473 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Legal); in HexagonTargetLowering()
1474 setOperationAction(ISD::SINT_TO_FP, MVT::i64, Legal); in HexagonTargetLowering()
1476 setOperationAction(ISD::FABS, MVT::f32, Legal); in HexagonTargetLowering()
1477 setOperationAction(ISD::FABS, MVT::f64, Expand); in HexagonTargetLowering()
1479 setOperationAction(ISD::FNEG, MVT::f32, Legal); in HexagonTargetLowering()
1480 setOperationAction(ISD::FNEG, MVT::f64, Expand); in HexagonTargetLowering()
1484 setOperationAction(ISD::FP_TO_SINT, MVT::i32, Expand); in HexagonTargetLowering()
1485 setOperationAction(ISD::FP_TO_UINT, MVT::i32, Expand); in HexagonTargetLowering()
1487 setOperationAction(ISD::SINT_TO_FP, MVT::i32, Expand); in HexagonTargetLowering()
1488 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Expand); in HexagonTargetLowering()
1513 setOperationAction(ISD::FADD, MVT::f32, Expand); in HexagonTargetLowering()
1514 setOperationAction(ISD::FADD, MVT::f64, Expand); in HexagonTargetLowering()
1517 setOperationAction(ISD::FSUB, MVT::f32, Expand); in HexagonTargetLowering()
1518 setOperationAction(ISD::FSUB, MVT::f64, Expand); in HexagonTargetLowering()
1521 setOperationAction(ISD::FP_EXTEND, MVT::f32, Expand); in HexagonTargetLowering()
1524 setCondCodeAction(ISD::SETOEQ, MVT::f32, Expand); in HexagonTargetLowering()
1527 setCondCodeAction(ISD::SETOEQ, MVT::f64, Expand); in HexagonTargetLowering()
1530 setCondCodeAction(ISD::SETOGE, MVT::f32, Expand); in HexagonTargetLowering()
1533 setCondCodeAction(ISD::SETOGE, MVT::f64, Expand); in HexagonTargetLowering()
1536 setCondCodeAction(ISD::SETOGT, MVT::f32, Expand); in HexagonTargetLowering()
1539 setCondCodeAction(ISD::SETOGT, MVT::f64, Expand); in HexagonTargetLowering()
1542 setOperationAction(ISD::FP_TO_SINT, MVT::f64, Expand); in HexagonTargetLowering()
1545 setOperationAction(ISD::FP_TO_SINT, MVT::f32, Expand); in HexagonTargetLowering()
1548 setCondCodeAction(ISD::SETOLE, MVT::f64, Expand); in HexagonTargetLowering()
1551 setCondCodeAction(ISD::SETOLE, MVT::f32, Expand); in HexagonTargetLowering()
1554 setCondCodeAction(ISD::SETOLT, MVT::f64, Expand); in HexagonTargetLowering()
1557 setCondCodeAction(ISD::SETOLT, MVT::f32, Expand); in HexagonTargetLowering()
1559 setOperationAction(ISD::FMUL, MVT::f64, Expand); in HexagonTargetLowering()
1562 setOperationAction(ISD::MUL, MVT::f32, Expand); in HexagonTargetLowering()
1565 setCondCodeAction(ISD::SETUNE, MVT::f64, Expand); in HexagonTargetLowering()
1570 setOperationAction(ISD::SUB, MVT::f64, Expand); in HexagonTargetLowering()
1573 setOperationAction(ISD::SUB, MVT::f32, Expand); in HexagonTargetLowering()
1576 setOperationAction(ISD::FP_ROUND, MVT::f64, Expand); in HexagonTargetLowering()
1579 setCondCodeAction(ISD::SETUO, MVT::f64, Expand); in HexagonTargetLowering()
1582 setCondCodeAction(ISD::SETO, MVT::f64, Expand); in HexagonTargetLowering()
1585 setCondCodeAction(ISD::SETO, MVT::f32, Expand); in HexagonTargetLowering()
1588 setCondCodeAction(ISD::SETUO, MVT::f32, Expand); in HexagonTargetLowering()
1590 setOperationAction(ISD::FABS, MVT::f32, Expand); in HexagonTargetLowering()
1591 setOperationAction(ISD::FABS, MVT::f64, Expand); in HexagonTargetLowering()
1592 setOperationAction(ISD::FNEG, MVT::f32, Expand); in HexagonTargetLowering()
1593 setOperationAction(ISD::FNEG, MVT::f64, Expand); in HexagonTargetLowering()
1597 setOperationAction(ISD::SREM, MVT::i32, Expand); in HexagonTargetLowering()
1599 setIndexedLoadAction(ISD::POST_INC, MVT::i8, Legal); in HexagonTargetLowering()
1600 setIndexedLoadAction(ISD::POST_INC, MVT::i16, Legal); in HexagonTargetLowering()
1601 setIndexedLoadAction(ISD::POST_INC, MVT::i32, Legal); in HexagonTargetLowering()
1602 setIndexedLoadAction(ISD::POST_INC, MVT::i64, Legal); in HexagonTargetLowering()
1604 setIndexedStoreAction(ISD::POST_INC, MVT::i8, Legal); in HexagonTargetLowering()
1605 setIndexedStoreAction(ISD::POST_INC, MVT::i16, Legal); in HexagonTargetLowering()
1606 setIndexedStoreAction(ISD::POST_INC, MVT::i32, Legal); in HexagonTargetLowering()
1607 setIndexedStoreAction(ISD::POST_INC, MVT::i64, Legal); in HexagonTargetLowering()
1609 setOperationAction(ISD::BUILD_PAIR, MVT::i64, Expand); in HexagonTargetLowering()
1613 setLoadExtAction(ISD::EXTLOAD, VT, MVT::f32, Expand); in HexagonTargetLowering()
1617 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i32, Expand); in HexagonTargetLowering()
1618 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i32, Expand); in HexagonTargetLowering()
1619 setLoadExtAction(ISD::EXTLOAD, VT, MVT::i32, Expand); in HexagonTargetLowering()
1626 setOperationAction(ISD::GlobalAddress, MVT::i32, Custom); in HexagonTargetLowering()
1627 setOperationAction(ISD::GlobalAddress, MVT::i8, Custom); in HexagonTargetLowering()
1628 setOperationAction(ISD::BlockAddress, MVT::i32, Custom); in HexagonTargetLowering()
1630 setOperationAction(ISD::TRUNCATE, MVT::i64, Expand); in HexagonTargetLowering()
1633 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Expand); in HexagonTargetLowering()
1636 setOperationAction(ISD::UREM, MVT::i32, Expand); in HexagonTargetLowering()
1637 setOperationAction(ISD::SREM, MVT::i32, Expand); in HexagonTargetLowering()
1638 setOperationAction(ISD::SDIVREM, MVT::i32, Expand); in HexagonTargetLowering()
1639 setOperationAction(ISD::UDIVREM, MVT::i32, Expand); in HexagonTargetLowering()
1640 setOperationAction(ISD::SREM, MVT::i64, Expand); in HexagonTargetLowering()
1641 setOperationAction(ISD::SDIVREM, MVT::i64, Expand); in HexagonTargetLowering()
1642 setOperationAction(ISD::UDIVREM, MVT::i64, Expand); in HexagonTargetLowering()
1644 setOperationAction(ISD::BSWAP, MVT::i64, Expand); in HexagonTargetLowering()
1647 setOperationAction(ISD::SELECT_CC, MVT::i1, Expand); in HexagonTargetLowering()
1648 setOperationAction(ISD::SELECT_CC, MVT::i32, Expand); in HexagonTargetLowering()
1649 setOperationAction(ISD::SELECT_CC, MVT::i64, Expand); in HexagonTargetLowering()
1656 setOperationAction(ISD::SELECT, MVT::f32, Custom); in HexagonTargetLowering()
1657 setOperationAction(ISD::SELECT, MVT::f64, Custom); in HexagonTargetLowering()
1659 setOperationAction(ISD::SELECT_CC, MVT::f32, Expand); in HexagonTargetLowering()
1660 setOperationAction(ISD::SELECT_CC, MVT::f64, Expand); in HexagonTargetLowering()
1665 setOperationAction(ISD::SELECT, MVT::f32, Expand); in HexagonTargetLowering()
1666 setOperationAction(ISD::SELECT, MVT::f64, Expand); in HexagonTargetLowering()
1670 setOperationAction(ISD::SETCC, MVT::i16, Custom); in HexagonTargetLowering()
1671 setOperationAction(ISD::SETCC, MVT::i8, Custom); in HexagonTargetLowering()
1674 setOperationAction(ISD::BR_JT, MVT::Other, Custom); in HexagonTargetLowering()
1676 setOperationAction(ISD::BR_JT, MVT::Other, Expand); in HexagonTargetLowering()
1681 setOperationAction(ISD::BR_CC, MVT::f32, Expand); in HexagonTargetLowering()
1682 setOperationAction(ISD::BR_CC, MVT::f64, Expand); in HexagonTargetLowering()
1683 setOperationAction(ISD::BR_CC, MVT::i1, Expand); in HexagonTargetLowering()
1684 setOperationAction(ISD::BR_CC, MVT::i32, Expand); in HexagonTargetLowering()
1685 setOperationAction(ISD::BR_CC, MVT::i64, Expand); in HexagonTargetLowering()
1687 setOperationAction(ISD::ATOMIC_FENCE, MVT::Other, Custom); in HexagonTargetLowering()
1689 setOperationAction(ISD::FSIN, MVT::f64, Expand); in HexagonTargetLowering()
1690 setOperationAction(ISD::FCOS, MVT::f64, Expand); in HexagonTargetLowering()
1691 setOperationAction(ISD::FREM, MVT::f64, Expand); in HexagonTargetLowering()
1692 setOperationAction(ISD::FSIN, MVT::f32, Expand); in HexagonTargetLowering()
1693 setOperationAction(ISD::FCOS, MVT::f32, Expand); in HexagonTargetLowering()
1694 setOperationAction(ISD::FREM, MVT::f32, Expand); in HexagonTargetLowering()
1695 setOperationAction(ISD::FSINCOS, MVT::f64, Expand); in HexagonTargetLowering()
1696 setOperationAction(ISD::FSINCOS, MVT::f32, Expand); in HexagonTargetLowering()
1703 setOperationAction(ISD::ADDE, MVT::i8, Expand); in HexagonTargetLowering()
1704 setOperationAction(ISD::ADDE, MVT::i16, Expand); in HexagonTargetLowering()
1705 setOperationAction(ISD::ADDE, MVT::i32, Expand); in HexagonTargetLowering()
1706 setOperationAction(ISD::ADDE, MVT::i64, Expand); in HexagonTargetLowering()
1707 setOperationAction(ISD::SUBE, MVT::i8, Expand); in HexagonTargetLowering()
1708 setOperationAction(ISD::SUBE, MVT::i16, Expand); in HexagonTargetLowering()
1709 setOperationAction(ISD::SUBE, MVT::i32, Expand); in HexagonTargetLowering()
1710 setOperationAction(ISD::SUBE, MVT::i64, Expand); in HexagonTargetLowering()
1711 setOperationAction(ISD::ADDC, MVT::i8, Expand); in HexagonTargetLowering()
1712 setOperationAction(ISD::ADDC, MVT::i16, Expand); in HexagonTargetLowering()
1713 setOperationAction(ISD::ADDC, MVT::i32, Expand); in HexagonTargetLowering()
1714 setOperationAction(ISD::ADDC, MVT::i64, Expand); in HexagonTargetLowering()
1715 setOperationAction(ISD::SUBC, MVT::i8, Expand); in HexagonTargetLowering()
1716 setOperationAction(ISD::SUBC, MVT::i16, Expand); in HexagonTargetLowering()
1717 setOperationAction(ISD::SUBC, MVT::i32, Expand); in HexagonTargetLowering()
1718 setOperationAction(ISD::SUBC, MVT::i64, Expand); in HexagonTargetLowering()
1722 setOperationAction(ISD::UADDO, VT, Expand); in HexagonTargetLowering()
1723 setOperationAction(ISD::SADDO, VT, Expand); in HexagonTargetLowering()
1724 setOperationAction(ISD::USUBO, VT, Expand); in HexagonTargetLowering()
1725 setOperationAction(ISD::SSUBO, VT, Expand); in HexagonTargetLowering()
1728 setOperationAction(ISD::CTPOP, MVT::i32, Expand); in HexagonTargetLowering()
1729 setOperationAction(ISD::CTPOP, MVT::i64, Expand); in HexagonTargetLowering()
1730 setOperationAction(ISD::CTTZ, MVT::i32, Expand); in HexagonTargetLowering()
1731 setOperationAction(ISD::CTTZ, MVT::i64, Expand); in HexagonTargetLowering()
1732 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i32, Expand); in HexagonTargetLowering()
1733 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i64, Expand); in HexagonTargetLowering()
1734 setOperationAction(ISD::CTLZ, MVT::i32, Expand); in HexagonTargetLowering()
1735 setOperationAction(ISD::CTLZ, MVT::i64, Expand); in HexagonTargetLowering()
1736 setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i32, Expand); in HexagonTargetLowering()
1737 setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i64, Expand); in HexagonTargetLowering()
1739 setOperationAction(ISD::ROTL, MVT::i32, Expand); in HexagonTargetLowering()
1740 setOperationAction(ISD::ROTR, MVT::i32, Expand); in HexagonTargetLowering()
1741 setOperationAction(ISD::BSWAP, MVT::i32, Expand); in HexagonTargetLowering()
1742 setOperationAction(ISD::ROTL, MVT::i64, Expand); in HexagonTargetLowering()
1743 setOperationAction(ISD::ROTR, MVT::i64, Expand); in HexagonTargetLowering()
1744 setOperationAction(ISD::SHL_PARTS, MVT::i64, Expand); in HexagonTargetLowering()
1745 setOperationAction(ISD::SRA_PARTS, MVT::i64, Expand); in HexagonTargetLowering()
1746 setOperationAction(ISD::SRL_PARTS, MVT::i64, Expand); in HexagonTargetLowering()
1747 setOperationAction(ISD::BR_CC, MVT::i64, Expand); in HexagonTargetLowering()
1749 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand); in HexagonTargetLowering()
1750 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand); in HexagonTargetLowering()
1751 setOperationAction(ISD::FPOW, MVT::f64, Expand); in HexagonTargetLowering()
1752 setOperationAction(ISD::FPOW, MVT::f32, Expand); in HexagonTargetLowering()
1754 setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand); in HexagonTargetLowering()
1755 setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand); in HexagonTargetLowering()
1756 setOperationAction(ISD::SRL_PARTS, MVT::i32, Expand); in HexagonTargetLowering()
1758 setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand); in HexagonTargetLowering()
1759 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand); in HexagonTargetLowering()
1761 setOperationAction(ISD::MULHS, MVT::i64, Expand); in HexagonTargetLowering()
1762 setOperationAction(ISD::SMUL_LOHI, MVT::i64, Expand); in HexagonTargetLowering()
1763 setOperationAction(ISD::UMUL_LOHI, MVT::i64, Expand); in HexagonTargetLowering()
1765 setOperationAction(ISD::EH_RETURN, MVT::Other, Custom); in HexagonTargetLowering()
1771 setOperationAction(ISD::VASTART, MVT::Other, Custom); in HexagonTargetLowering()
1774 setOperationAction(ISD::VAARG, MVT::Other, Expand); in HexagonTargetLowering()
1775 setOperationAction(ISD::VACOPY, MVT::Other, Expand); in HexagonTargetLowering()
1776 setOperationAction(ISD::VAEND, MVT::Other, Expand); in HexagonTargetLowering()
1777 setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); in HexagonTargetLowering()
1778 setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); in HexagonTargetLowering()
1780 setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Custom); in HexagonTargetLowering()
1781 setOperationAction(ISD::INLINEASM, MVT::Other, Custom); in HexagonTargetLowering()
1896 if (V2.getOpcode() == ISD::UNDEF) in LowerVECTOR_SHUFFLE()
1904 if (Lane == 0 && V1.getOpcode() == ISD::SCALAR_TO_VECTOR) in LowerVECTOR_SHUFFLE()
1910 if (Lane == 0 && V1.getOpcode() == ISD::BUILD_VECTOR && in LowerVECTOR_SHUFFLE()
1914 if (V1.getOperand(i).getOpcode() != ISD::UNDEF) { in LowerVECTOR_SHUFFLE()
1971 case ISD::SRA: in LowerVECTOR_SHIFT()
1974 case ISD::SHL: in LowerVECTOR_SHIFT()
1977 case ISD::SRL: in LowerVECTOR_SHIFT()
1985 case ISD::SRA: in LowerVECTOR_SHIFT()
1988 case ISD::SHL: in LowerVECTOR_SHIFT()
1991 case ISD::SRL: in LowerVECTOR_SHIFT()
2001 return DAG.getNode(ISD::BITCAST, dl, VT, Result); in LowerVECTOR_SHIFT()
2037 if (V0.getOpcode() == ISD::UNDEF) in LowerBUILD_VECTOR()
2039 if (V1.getOpcode() == ISD::UNDEF) in LowerBUILD_VECTOR()
2059 if (BVN->getOperand(i).getOpcode() == ISD::UNDEF) in LowerBUILD_VECTOR()
2087 if (Operand.getOpcode() == ISD::UNDEF) in LowerBUILD_VECTOR()
2110 SDValue Shifted = DAG.getNode(ISD::SHL, dl, MVT::i64, Width, in LowerBUILD_VECTOR()
2129 SDValue Offset = DAG.getNode(ISD::MUL, dl, MVT::i64, Idx, Width); in LowerBUILD_VECTOR()
2130 SDValue Combined = DAG.getNode(ISD::OR, dl, MVT::i64, Shifted, Offset); in LowerBUILD_VECTOR()
2140 return DAG.getNode(ISD::BITCAST, dl, VT, ConstVal); in LowerBUILD_VECTOR()
2152 SDValue Shifted = DAG.getNode(ISD::SHL, dl, MVT::i64, Width, in LowerCONCAT_VECTORS()
2164 return DAG.getNode(ISD::BITCAST, dl, VT, Combined); in LowerCONCAT_VECTORS()
2173 return DAG.getNode(ISD::BITCAST, dl, VT, Combined); in LowerCONCAT_VECTORS()
2188 SDValue Offset = DAG.getNode(ISD::MUL, dl, MVT::i64, Idx, Width); in LowerCONCAT_VECTORS()
2189 SDValue Combined = DAG.getNode(ISD::OR, dl, MVT::i64, Shifted, Offset); in LowerCONCAT_VECTORS()
2198 return DAG.getNode(ISD::BITCAST, dl, VT, ConstVal); in LowerCONCAT_VECTORS()
2212 SDValue Width = DAG.getConstant(Op.getOpcode() == ISD::EXTRACT_VECTOR_ELT ? in LowerEXTRACT_VECTOR()
2265 return DAG.getNode(ISD::BITCAST, dl, VT, N); in LowerEXTRACT_VECTOR()
2269 SDValue Offset = DAG.getNode(ISD::MUL, dl, MVT::i32, Idx, in LowerEXTRACT_VECTOR()
2271 SDValue Shifted = DAG.getNode(ISD::SHL, dl, MVT::i64, Width, in LowerEXTRACT_VECTOR()
2273 SDValue Combined = DAG.getNode(ISD::OR, dl, MVT::i64, Shifted, Offset); in LowerEXTRACT_VECTOR()
2285 return DAG.getNode(ISD::BITCAST, dl, VT, N); in LowerEXTRACT_VECTOR()
2300 SDValue Width = DAG.getConstant(Op.getOpcode() == ISD::INSERT_VECTOR_ELT ? in LowerINSERT_VECTOR()
2313 return DAG.getNode(ISD::BITCAST, dl, VT, N); in LowerINSERT_VECTOR()
2317 SDValue Offset = DAG.getNode(ISD::MUL, dl, MVT::i32, Idx, in LowerINSERT_VECTOR()
2319 SDValue Shifted = DAG.getNode(ISD::SHL, dl, MVT::i64, Width, in LowerINSERT_VECTOR()
2321 SDValue Combined = DAG.getNode(ISD::OR, dl, MVT::i64, Shifted, Offset); in LowerINSERT_VECTOR()
2337 return DAG.getNode(ISD::BITCAST, dl, VT, N); in LowerINSERT_VECTOR()
2367 SDValue StoreAddr = DAG.getNode(ISD::ADD, dl, getPointerTy(), in LowerEH_RETURN()
2384 case ISD::CONCAT_VECTORS: return LowerCONCAT_VECTORS(Op, DAG); in LowerOperation()
2385 case ISD::INSERT_SUBVECTOR: return LowerINSERT_VECTOR(Op, DAG); in LowerOperation()
2386 case ISD::INSERT_VECTOR_ELT: return LowerINSERT_VECTOR(Op, DAG); in LowerOperation()
2387 case ISD::EXTRACT_SUBVECTOR: return LowerEXTRACT_VECTOR(Op, DAG); in LowerOperation()
2388 case ISD::EXTRACT_VECTOR_ELT: return LowerEXTRACT_VECTOR(Op, DAG); in LowerOperation()
2389 case ISD::BUILD_VECTOR: return LowerBUILD_VECTOR(Op, DAG); in LowerOperation()
2390 case ISD::VECTOR_SHUFFLE: return LowerVECTOR_SHUFFLE(Op, DAG); in LowerOperation()
2391 case ISD::SRA: in LowerOperation()
2392 case ISD::SHL: in LowerOperation()
2393 case ISD::SRL: in LowerOperation()
2395 case ISD::ConstantPool: in LowerOperation()
2397 case ISD::EH_RETURN: return LowerEH_RETURN(Op, DAG); in LowerOperation()
2399 case ISD::RETURNADDR: return LowerRETURNADDR(Op, DAG); in LowerOperation()
2400 case ISD::FRAMEADDR: return LowerFRAMEADDR(Op, DAG); in LowerOperation()
2401 case ISD::GlobalTLSAddress: in LowerOperation()
2403 case ISD::ATOMIC_FENCE: return LowerATOMIC_FENCE(Op, DAG); in LowerOperation()
2404 case ISD::GlobalAddress: return LowerGLOBALADDRESS(Op, DAG); in LowerOperation()
2405 case ISD::BlockAddress: return LowerBlockAddress(Op, DAG); in LowerOperation()
2406 case ISD::VASTART: return LowerVASTART(Op, DAG); in LowerOperation()
2407 case ISD::BR_JT: return LowerBR_JT(Op, DAG); in LowerOperation()
2409 case ISD::LOAD: return LowerLOAD(Op, DAG); in LowerOperation()
2411 case ISD::DYNAMIC_STACKALLOC: return LowerDYNAMIC_STACKALLOC(Op, DAG); in LowerOperation()
2412 case ISD::SELECT: return Op; in LowerOperation()
2413 case ISD::SETCC: return LowerSETCC(Op, DAG); in LowerOperation()
2414 case ISD::VSELECT: return LowerVSELECT(Op, DAG); in LowerOperation()
2415 case ISD::CTPOP: return LowerCTPOP(Op, DAG); in LowerOperation()
2416 case ISD::INTRINSIC_WO_CHAIN: return LowerINTRINSIC_WO_CHAIN(Op, DAG); in LowerOperation()
2417 case ISD::INLINEASM: return LowerINLINEASM(Op, DAG); in LowerOperation()
2523 const SmallVectorImpl<ISD::OutputArg> &Outs, in IsEligibleForTailCallOptimization()
2525 const SmallVectorImpl<ISD::InputArg> &Ins, in IsEligibleForTailCallOptimization()
2571 case ISD::SIGN_EXTEND_INREG: in isPositiveHalfWord()