MipsAsmParser.cpp - OpenGrok cross reference for /external/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp

Lines Matching refs:CreateReg
529   static std::unique_ptr<MipsOperand> CreateReg(unsigned Index, RegKind RegKind,  in CreateReg()  function in __anond0efcad40311::MipsOperand
705     Inst.addOperand(MCOperand::CreateReg(getGPR32Reg()));  in addGPR32AsmRegOperands()
710     Inst.addOperand(MCOperand::CreateReg(getGPRMM16Reg()));  in addGPRMM16AsmRegOperands()
715     Inst.addOperand(MCOperand::CreateReg(getGPRMM16Reg()));  in addGPRMM16AsmRegZeroOperands()
720     Inst.addOperand(MCOperand::CreateReg(getGPRMM16Reg()));  in addGPRMM16AsmRegMovePOperands()
728     Inst.addOperand(MCOperand::CreateReg(getGPR64Reg()));  in addGPR64AsmRegOperands()
733     Inst.addOperand(MCOperand::CreateReg(getAFGR64Reg()));  in addAFGR64AsmRegOperands()
738     Inst.addOperand(MCOperand::CreateReg(getFGR64Reg()));  in addFGR64AsmRegOperands()
743     Inst.addOperand(MCOperand::CreateReg(getFGR32Reg()));  in addFGR32AsmRegOperands()
752     Inst.addOperand(MCOperand::CreateReg(getFGRH32Reg()));  in addFGRH32AsmRegOperands()
757     Inst.addOperand(MCOperand::CreateReg(getFCCReg()));  in addFCCAsmRegOperands()
762     Inst.addOperand(MCOperand::CreateReg(getMSA128Reg()));  in addMSA128AsmRegOperands()
767     Inst.addOperand(MCOperand::CreateReg(getMSACtrlReg()));  in addMSACtrlAsmRegOperands()
772     Inst.addOperand(MCOperand::CreateReg(getCOP2Reg()));  in addCOP2AsmRegOperands()
777     Inst.addOperand(MCOperand::CreateReg(getCOP3Reg()));  in addCOP3AsmRegOperands()
782     Inst.addOperand(MCOperand::CreateReg(getACC64DSPReg()));  in addACC64DSPAsmRegOperands()
787     Inst.addOperand(MCOperand::CreateReg(getHI32DSPReg()));  in addHI32DSPAsmRegOperands()
792     Inst.addOperand(MCOperand::CreateReg(getLO32DSPReg()));  in addLO32DSPAsmRegOperands()
797     Inst.addOperand(MCOperand::CreateReg(getCCRReg()));  in addCCRAsmRegOperands()
802     Inst.addOperand(MCOperand::CreateReg(getHWRegsReg()));  in addHWRegsAsmRegOperands()
814     Inst.addOperand(MCOperand::CreateReg(getMemBase()->getGPR32Reg()));  in addMemOperands()
823     Inst.addOperand(MCOperand::CreateReg(getMemBase()->getGPRMM16Reg()));  in addMicroMipsMemOperands()
833       Inst.addOperand(MCOperand::CreateReg(RegNo));  in addRegListOperands()
839     Inst.addOperand(MCOperand::CreateReg(RegNo++));  in addRegPairOperands()
840     Inst.addOperand(MCOperand::CreateReg(RegNo));  in addRegPairOperands()
846       Inst.addOperand(MCOperand::CreateReg(RegNo));  in addMovePRegPairOperands()
1000     return CreateReg(Index, RegKind_Numeric, RegInfo, S, E, Parser);  in createNumericReg()
1008     return CreateReg(Index, RegKind_GPR, RegInfo, S, E, Parser);  in createGPRReg()
1016     return CreateReg(Index, RegKind_FGR, RegInfo, S, E, Parser);  in createFGRReg()
1024     return CreateReg(Index, RegKind_HWRegs, RegInfo, S, E, Parser);  in createHWRegsReg()
1032     return CreateReg(Index, RegKind_FCC, RegInfo, S, E, Parser);  in createFCCReg()
1040     return CreateReg(Index, RegKind_ACC, RegInfo, S, E, Parser);  in createACCReg()
1048     return CreateReg(Index, RegKind_MSA128, RegInfo, S, E, Parser);  in createMSA128Reg()
1056     return CreateReg(Index, RegKind_MSACtrl, RegInfo, S, E, Parser);  in createMSACtrlReg()
1445               TmpInst.addOperand(MCOperand::CreateReg(DstReg.getReg()));  in processInstruction()
1446               TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));  in processInstruction()
1641     tmpInst.addOperand(MCOperand::CreateReg(RegNo));  in createShiftOr()
1642     tmpInst.addOperand(MCOperand::CreateReg(RegNo));  in createShiftOr()
1649   tmpInst.addOperand(MCOperand::CreateReg(RegNo));  in createShiftOr()
1650   tmpInst.addOperand(MCOperand::CreateReg(RegNo));  in createShiftOr()
1680       JalrInst.addOperand(MCOperand::CreateReg(Mips::RA));  in expandJalWithRegs()
1698     NopInst.addOperand(MCOperand::CreateReg(Mips::ZERO));  in expandJalWithRegs()
1699     NopInst.addOperand(MCOperand::CreateReg(Mips::ZERO));  in expandJalWithRegs()
1723     tmpInst.addOperand(MCOperand::CreateReg(RegOp.getReg()));  in expandLoadImm()
1724     tmpInst.addOperand(MCOperand::CreateReg(Mips::ZERO));  in expandLoadImm()
1731     tmpInst.addOperand(MCOperand::CreateReg(RegOp.getReg()));  in expandLoadImm()
1732     tmpInst.addOperand(MCOperand::CreateReg(Mips::ZERO));  in expandLoadImm()
1740     tmpInst.addOperand(MCOperand::CreateReg(RegOp.getReg()));  in expandLoadImm()
1764     tmpInst.addOperand(MCOperand::CreateReg(RegOp.getReg()));  in expandLoadImm()
1791     tmpInst.addOperand(MCOperand::CreateReg(RegOp.getReg()));  in expandLoadImm()
1822     tmpInst.addOperand(MCOperand::CreateReg(DstRegOp.getReg()));  in expandLoadAddressReg()
1823     tmpInst.addOperand(MCOperand::CreateReg(SrcRegOp.getReg()));  in expandLoadAddressReg()
1832     tmpInst.addOperand(MCOperand::CreateReg(DstRegOp.getReg()));  in expandLoadAddressReg()
1837     tmpInst.addOperand(MCOperand::CreateReg(DstRegOp.getReg()));  in expandLoadAddressReg()
1838     tmpInst.addOperand(MCOperand::CreateReg(DstRegOp.getReg()));  in expandLoadAddressReg()
1843     tmpInst.addOperand(MCOperand::CreateReg(DstRegOp.getReg()));  in expandLoadAddressReg()
1844     tmpInst.addOperand(MCOperand::CreateReg(DstRegOp.getReg()));  in expandLoadAddressReg()
1845     tmpInst.addOperand(MCOperand::CreateReg(SrcRegOp.getReg()));  in expandLoadAddressReg()
1869     tmpInst.addOperand(MCOperand::CreateReg(RegOp.getReg()));  in expandLoadAddressImm()
1870     tmpInst.addOperand(MCOperand::CreateReg(Mips::ZERO));  in expandLoadAddressImm()
1878     tmpInst.addOperand(MCOperand::CreateReg(RegOp.getReg()));  in expandLoadAddressImm()
1883     tmpInst.addOperand(MCOperand::CreateReg(RegOp.getReg()));  in expandLoadAddressImm()
1884     tmpInst.addOperand(MCOperand::CreateReg(RegOp.getReg()));  in expandLoadAddressImm()
1932     tmpInst.addOperand(MCOperand::CreateReg(RegNo));  in expandLoadAddressSym()
1947     tmpInst.addOperand(MCOperand::CreateReg(RegNo));  in expandLoadAddressSym()
1965     Inst.addOperand(MCOperand::CreateReg(Mips::ZERO));  in expandUncondBranchMMPseudo()
1966     Inst.addOperand(MCOperand::CreateReg(Mips::ZERO));  in expandUncondBranchMMPseudo()
1981       Inst.addOperand(MCOperand::CreateReg(Mips::ZERO));  in expandUncondBranchMMPseudo()
1982       Inst.addOperand(MCOperand::CreateReg(Mips::ZERO));  in expandUncondBranchMMPseudo()
2061   TempInst.addOperand(MCOperand::CreateReg(TmpRegNum));  in expandMemInst()
2083     TempInst.addOperand(MCOperand::CreateReg(TmpRegNum));  in expandMemInst()
2084     TempInst.addOperand(MCOperand::CreateReg(TmpRegNum));  in expandMemInst()
2085     TempInst.addOperand(MCOperand::CreateReg(BaseRegNum));  in expandMemInst()
2092   TempInst.addOperand(MCOperand::CreateReg(RegOpNum));  in expandMemInst()
2093   TempInst.addOperand(MCOperand::CreateReg(TmpRegNum));  in expandMemInst()
2139     NopInst.addOperand(MCOperand::CreateReg(Mips::ZERO));  in createNop()
2140     NopInst.addOperand(MCOperand::CreateReg(Mips::ZERO));  in createNop()
2143     NopInst.addOperand(MCOperand::CreateReg(Mips::ZERO));  in createNop()
2144     NopInst.addOperand(MCOperand::CreateReg(Mips::ZERO));  in createNop()