689       Inst.addOperand(MCOperand::CreateImm(0));  in addExpr()
691       Inst.addOperand(MCOperand::CreateImm(CE->getValue()));  in addExpr()
693       Inst.addOperand(MCOperand::CreateExpr(Expr));  in addExpr()
705     Inst.addOperand(MCOperand::CreateReg(getGPR32Reg()));  in addGPR32AsmRegOperands()
710     Inst.addOperand(MCOperand::CreateReg(getGPRMM16Reg()));  in addGPRMM16AsmRegOperands()
715     Inst.addOperand(MCOperand::CreateReg(getGPRMM16Reg()));  in addGPRMM16AsmRegZeroOperands()
720     Inst.addOperand(MCOperand::CreateReg(getGPRMM16Reg()));  in addGPRMM16AsmRegMovePOperands()
728     Inst.addOperand(MCOperand::CreateReg(getGPR64Reg()));  in addGPR64AsmRegOperands()
733     Inst.addOperand(MCOperand::CreateReg(getAFGR64Reg()));  in addAFGR64AsmRegOperands()
738     Inst.addOperand(MCOperand::CreateReg(getFGR64Reg()));  in addFGR64AsmRegOperands()
743     Inst.addOperand(MCOperand::CreateReg(getFGR32Reg()));  in addFGR32AsmRegOperands()
752     Inst.addOperand(MCOperand::CreateReg(getFGRH32Reg()));  in addFGRH32AsmRegOperands()
757     Inst.addOperand(MCOperand::CreateReg(getFCCReg()));  in addFCCAsmRegOperands()
762     Inst.addOperand(MCOperand::CreateReg(getMSA128Reg()));  in addMSA128AsmRegOperands()
767     Inst.addOperand(MCOperand::CreateReg(getMSACtrlReg()));  in addMSACtrlAsmRegOperands()
772     Inst.addOperand(MCOperand::CreateReg(getCOP2Reg()));  in addCOP2AsmRegOperands()
777     Inst.addOperand(MCOperand::CreateReg(getCOP3Reg()));  in addCOP3AsmRegOperands()
782     Inst.addOperand(MCOperand::CreateReg(getACC64DSPReg()));  in addACC64DSPAsmRegOperands()
787     Inst.addOperand(MCOperand::CreateReg(getHI32DSPReg()));  in addHI32DSPAsmRegOperands()
792     Inst.addOperand(MCOperand::CreateReg(getLO32DSPReg()));  in addLO32DSPAsmRegOperands()
797     Inst.addOperand(MCOperand::CreateReg(getCCRReg()));  in addCCRAsmRegOperands()
802     Inst.addOperand(MCOperand::CreateReg(getHWRegsReg()));  in addHWRegsAsmRegOperands()
814     Inst.addOperand(MCOperand::CreateReg(getMemBase()->getGPR32Reg()));  in addMemOperands()
823     Inst.addOperand(MCOperand::CreateReg(getMemBase()->getGPRMM16Reg()));  in addMicroMipsMemOperands()
833       Inst.addOperand(MCOperand::CreateReg(RegNo));  in addRegListOperands()
839     Inst.addOperand(MCOperand::CreateReg(RegNo++));  in addRegPairOperands()
840     Inst.addOperand(MCOperand::CreateReg(RegNo));  in addRegPairOperands()
846       Inst.addOperand(MCOperand::CreateReg(RegNo));  in addMovePRegPairOperands()
1242     MCOperand Offset;  in processInstruction()
1318     MCOperand Opnd;  in processInstruction()
1399         MCOperand &Op = Inst.getOperand(i);  in processInstruction()
1433           MCOperand &Op = Inst.getOperand(i);  in processInstruction()
1436             MCOperand &DstReg = Inst.getOperand(0);  in processInstruction()
1437             MCOperand &BaseReg = Inst.getOperand(1);  in processInstruction()
1445               TmpInst.addOperand(MCOperand::CreateReg(DstReg.getReg()));  in processInstruction()
1446               TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));  in processInstruction()
1447               TmpInst.addOperand(MCOperand::CreateImm(MemOffset));  in processInstruction()
1458     MCOperand Opnd;  in processInstruction()
1571         MCOperand Opnd = Inst.getOperand(1);  in processInstruction()
1636 void createShiftOr(MCOperand Operand, unsigned RegNo, SMLoc IDLoc,  in createShiftOr()
1641     tmpInst.addOperand(MCOperand::CreateReg(RegNo));  in createShiftOr()
1642     tmpInst.addOperand(MCOperand::CreateReg(RegNo));  in createShiftOr()
1643     tmpInst.addOperand(MCOperand::CreateImm(16));  in createShiftOr()
1649   tmpInst.addOperand(MCOperand::CreateReg(RegNo));  in createShiftOr()
1650   tmpInst.addOperand(MCOperand::CreateReg(RegNo));  in createShiftOr()
1660       MCOperand::CreateImm(((Value & (0xffffLL << Shift)) >> Shift)), RegNo,  in createShiftOr()
1670   const MCOperand FirstRegOp = Inst.getOperand(0);  in expandJalWithRegs()
1680       JalrInst.addOperand(MCOperand::CreateReg(Mips::RA));  in expandJalWithRegs()
1687     const MCOperand SecondRegOp = Inst.getOperand(1);  in expandJalWithRegs()
1698     NopInst.addOperand(MCOperand::CreateReg(Mips::ZERO));  in expandJalWithRegs()
1699     NopInst.addOperand(MCOperand::CreateReg(Mips::ZERO));  in expandJalWithRegs()
1700     NopInst.addOperand(MCOperand::CreateImm(0));  in expandJalWithRegs()
1710   const MCOperand &ImmOp = Inst.getOperand(1);  in expandLoadImm()
1712   const MCOperand &RegOp = Inst.getOperand(0);  in expandLoadImm()
1723     tmpInst.addOperand(MCOperand::CreateReg(RegOp.getReg()));  in expandLoadImm()
1724     tmpInst.addOperand(MCOperand::CreateReg(Mips::ZERO));  in expandLoadImm()
1725     tmpInst.addOperand(MCOperand::CreateImm(ImmValue));  in expandLoadImm()
1731     tmpInst.addOperand(MCOperand::CreateReg(RegOp.getReg()));  in expandLoadImm()
1732     tmpInst.addOperand(MCOperand::CreateReg(Mips::ZERO));  in expandLoadImm()
1733     tmpInst.addOperand(MCOperand::CreateImm(ImmValue));  in expandLoadImm()
1740     tmpInst.addOperand(MCOperand::CreateReg(RegOp.getReg()));  in expandLoadImm()
1741     tmpInst.addOperand(MCOperand::CreateImm((ImmValue & 0xffff0000) >> 16));  in expandLoadImm()
1764     tmpInst.addOperand(MCOperand::CreateReg(RegOp.getReg()));  in expandLoadImm()
1766         MCOperand::CreateImm((ImmValue & (0xffffLL << 32)) >> 32));  in expandLoadImm()
1791     tmpInst.addOperand(MCOperand::CreateReg(RegOp.getReg()));  in expandLoadImm()
1793         MCOperand::CreateImm((ImmValue & (0xffffLL << 48)) >> 48));  in expandLoadImm()
1806   const MCOperand &ImmOp = Inst.getOperand(2);  in expandLoadAddressReg()
1813   const MCOperand &SrcRegOp = Inst.getOperand(1);  in expandLoadAddressReg()
1815   const MCOperand &DstRegOp = Inst.getOperand(0);  in expandLoadAddressReg()
1822     tmpInst.addOperand(MCOperand::CreateReg(DstRegOp.getReg()));  in expandLoadAddressReg()
1823     tmpInst.addOperand(MCOperand::CreateReg(SrcRegOp.getReg()));  in expandLoadAddressReg()
1824     tmpInst.addOperand(MCOperand::CreateImm(ImmValue));  in expandLoadAddressReg()
1832     tmpInst.addOperand(MCOperand::CreateReg(DstRegOp.getReg()));  in expandLoadAddressReg()
1833     tmpInst.addOperand(MCOperand::CreateImm((ImmValue & 0xffff0000) >> 16));  in expandLoadAddressReg()
1837     tmpInst.addOperand(MCOperand::CreateReg(DstRegOp.getReg()));  in expandLoadAddressReg()
1838     tmpInst.addOperand(MCOperand::CreateReg(DstRegOp.getReg()));  in expandLoadAddressReg()
1839     tmpInst.addOperand(MCOperand::CreateImm(ImmValue & 0xffff));  in expandLoadAddressReg()
1843     tmpInst.addOperand(MCOperand::CreateReg(DstRegOp.getReg()));  in expandLoadAddressReg()
1844     tmpInst.addOperand(MCOperand::CreateReg(DstRegOp.getReg()));  in expandLoadAddressReg()
1845     tmpInst.addOperand(MCOperand::CreateReg(SrcRegOp.getReg()));  in expandLoadAddressReg()
1855   const MCOperand &ImmOp = Inst.getOperand(1);  in expandLoadAddressImm()
1862   const MCOperand &RegOp = Inst.getOperand(0);  in expandLoadAddressImm()
1869     tmpInst.addOperand(MCOperand::CreateReg(RegOp.getReg()));  in expandLoadAddressImm()
1870     tmpInst.addOperand(MCOperand::CreateReg(Mips::ZERO));  in expandLoadAddressImm()
1871     tmpInst.addOperand(MCOperand::CreateImm(ImmValue));  in expandLoadAddressImm()
1878     tmpInst.addOperand(MCOperand::CreateReg(RegOp.getReg()));  in expandLoadAddressImm()
1879     tmpInst.addOperand(MCOperand::CreateImm((ImmValue & 0xffff0000) >> 16));  in expandLoadAddressImm()
1883     tmpInst.addOperand(MCOperand::CreateReg(RegOp.getReg()));  in expandLoadAddressImm()
1884     tmpInst.addOperand(MCOperand::CreateReg(RegOp.getReg()));  in expandLoadAddressImm()
1885     tmpInst.addOperand(MCOperand::CreateImm(ImmValue & 0xffff));  in expandLoadAddressImm()
1905   const MCOperand &SymOp = Inst.getOperand(ExprOperandNo);  in expandLoadAddressSym()
1907   const MCOperand &RegOp = Inst.getOperand(0);  in expandLoadAddressSym()
1932     tmpInst.addOperand(MCOperand::CreateReg(RegNo));  in expandLoadAddressSym()
1933     tmpInst.addOperand(MCOperand::CreateExpr(HighestExpr));  in expandLoadAddressSym()
1936     createShiftOr<false>(MCOperand::CreateExpr(HigherExpr), RegNo, SMLoc(),  in expandLoadAddressSym()
1938     createShiftOr<true>(MCOperand::CreateExpr(HiExpr), RegNo, SMLoc(),  in expandLoadAddressSym()
1940     createShiftOr<true>(MCOperand::CreateExpr(LoExpr), RegNo, SMLoc(),  in expandLoadAddressSym()
1947     tmpInst.addOperand(MCOperand::CreateReg(RegNo));  in expandLoadAddressSym()
1948     tmpInst.addOperand(MCOperand::CreateExpr(HiExpr));  in expandLoadAddressSym()
1951     createShiftOr<false>(MCOperand::CreateExpr(LoExpr), RegNo, SMLoc(),  in expandLoadAddressSym()
1961   MCOperand Offset = Inst.getOperand(0);  in expandUncondBranchMMPseudo()
1965     Inst.addOperand(MCOperand::CreateReg(Mips::ZERO));  in expandUncondBranchMMPseudo()
1966     Inst.addOperand(MCOperand::CreateReg(Mips::ZERO));  in expandUncondBranchMMPseudo()
1967     Inst.addOperand(MCOperand::CreateExpr(Offset.getExpr()));  in expandUncondBranchMMPseudo()
1981       Inst.addOperand(MCOperand::CreateReg(Mips::ZERO));  in expandUncondBranchMMPseudo()
1982       Inst.addOperand(MCOperand::CreateReg(Mips::ZERO));  in expandUncondBranchMMPseudo()
1983       Inst.addOperand(MCOperand::CreateImm(Offset.getImm()));  in expandUncondBranchMMPseudo()
2061   TempInst.addOperand(MCOperand::CreateReg(TmpRegNum));  in expandMemInst()
2063     TempInst.addOperand(MCOperand::CreateImm(HiOffset));  in expandMemInst()
2070       TempInst.addOperand(MCOperand::CreateExpr(HiExpr));  in expandMemInst()
2073       TempInst.addOperand(MCOperand::CreateExpr(HiExpr));  in expandMemInst()
2083     TempInst.addOperand(MCOperand::CreateReg(TmpRegNum));  in expandMemInst()
2084     TempInst.addOperand(MCOperand::CreateReg(TmpRegNum));  in expandMemInst()
2085     TempInst.addOperand(MCOperand::CreateReg(BaseRegNum));  in expandMemInst()
2092   TempInst.addOperand(MCOperand::CreateReg(RegOpNum));  in expandMemInst()
2093   TempInst.addOperand(MCOperand::CreateReg(TmpRegNum));  in expandMemInst()
2095     TempInst.addOperand(MCOperand::CreateImm(LoOffset));  in expandMemInst()
2101       TempInst.addOperand(MCOperand::CreateExpr(LoExpr));  in expandMemInst()
2104       TempInst.addOperand(MCOperand::CreateExpr(LoExpr));  in expandMemInst()
2139     NopInst.addOperand(MCOperand::CreateReg(Mips::ZERO));  in createNop()
2140     NopInst.addOperand(MCOperand::CreateReg(Mips::ZERO));  in createNop()
2143     NopInst.addOperand(MCOperand::CreateReg(Mips::ZERO));  in createNop()
2144     NopInst.addOperand(MCOperand::CreateReg(Mips::ZERO));  in createNop()
2145     NopInst.addOperand(MCOperand::CreateImm(0));  in createNop()