546     assert(isRegIdx() && (RegIdx.Kind & RegKind_GPR) && "Invalid access!");  in getGPR32Reg()
555     assert(isRegIdx() && (RegIdx.Kind & RegKind_GPR) && "Invalid access!");  in getGPRMM16Reg()
563     assert(isRegIdx() && (RegIdx.Kind & RegKind_GPR) && "Invalid access!");  in getGPR64Reg()
572     assert(isRegIdx() && (RegIdx.Kind & RegKind_FGR) && "Invalid access!");  in getAFGR64Reg()
582     assert(isRegIdx() && (RegIdx.Kind & RegKind_FGR) && "Invalid access!");  in getFGR64Reg()
590     assert(isRegIdx() && (RegIdx.Kind & RegKind_FGR) && "Invalid access!");  in getFGR32Reg()
598     assert(isRegIdx() && (RegIdx.Kind & RegKind_FGR) && "Invalid access!");  in getFGRH32Reg()
606     assert(isRegIdx() && (RegIdx.Kind & RegKind_FCC) && "Invalid access!");  in getFCCReg()
614     assert(isRegIdx() && (RegIdx.Kind & RegKind_MSA128) && "Invalid access!");  in getMSA128Reg()
624     assert(isRegIdx() && (RegIdx.Kind & RegKind_MSACtrl) && "Invalid access!");  in getMSACtrlReg()
632     assert(isRegIdx() && (RegIdx.Kind & RegKind_COP2) && "Invalid access!");  in getCOP2Reg()
640     assert(isRegIdx() && (RegIdx.Kind & RegKind_COP3) && "Invalid access!");  in getCOP3Reg()
648     assert(isRegIdx() && (RegIdx.Kind & RegKind_ACC) && "Invalid access!");  in getACC64DSPReg()
656     assert(isRegIdx() && (RegIdx.Kind & RegKind_ACC) && "Invalid access!");  in getHI32DSPReg()
664     assert(isRegIdx() && (RegIdx.Kind & RegKind_ACC) && "Invalid access!");  in getLO32DSPReg()
672     assert(isRegIdx() && (RegIdx.Kind & RegKind_CCR) && "Invalid access!");  in getCCRReg()
680     assert(isRegIdx() && (RegIdx.Kind & RegKind_HWRegs) && "Invalid access!");  in getHWRegsReg()
857   bool isRegIdx() const { return Kind == k_RegisterIndex; }  in isRegIdx()  function in __anond0efcad40311::MipsOperand
879       && getMemBase()->isRegIdx() && (getMemBase()->getGPR32Reg() == Mips::SP);  in isMemWithUimmOffsetSP()
883       && (getConstantMemOff() % 4 == 0) && getMemBase()->isRegIdx()  in isMemWithUimmWordAlignedOffsetSP()
1101     return isRegIdx() && RegIdx.Kind & RegKind_GPR && RegIdx.Index <= 31;  in isGPRAsmReg()
1104     if (!(isRegIdx() && RegIdx.Kind))  in isMM16AsmReg()
1110     if (!(isRegIdx() && RegIdx.Kind))  in isMM16AsmRegZero()
1117     if (!(isRegIdx() && RegIdx.Kind))  in isMM16AsmRegMoveP()
1124     return isRegIdx() && RegIdx.Kind & RegKind_FGR && RegIdx.Index <= 31;  in isFGRAsmReg()
1127     return isRegIdx() && RegIdx.Kind & RegKind_HWRegs && RegIdx.Index <= 31;  in isHWRegsAsmReg()
1130     return isRegIdx() && RegIdx.Kind & RegKind_CCR && RegIdx.Index <= 31;  in isCCRAsmReg()
1133     if (!(isRegIdx() && RegIdx.Kind & RegKind_FCC))  in isFCCAsmReg()
1140     return isRegIdx() && RegIdx.Kind & RegKind_ACC && RegIdx.Index <= 3;  in isACCAsmReg()
1143     return isRegIdx() && RegIdx.Kind & RegKind_COP2 && RegIdx.Index <= 31;  in isCOP2AsmReg()
1146     return isRegIdx() && RegIdx.Kind & RegKind_COP3 && RegIdx.Index <= 31;  in isCOP3AsmReg()
1149     return isRegIdx() && RegIdx.Kind & RegKind_MSA128 && RegIdx.Index <= 31;  in isMSA128AsmReg()
1152     return isRegIdx() && RegIdx.Kind & RegKind_MSACtrl && RegIdx.Index <= 7;  in isMSACtrlAsmReg()