Lines Matching refs:TempReg

300     unsigned TempReg = materialize32BitInt(Imm, &Mips::GPR32RegClass);  in materializeFP()  local
301 emitInst(Mips::MTC1, DestReg).addReg(TempReg); in materializeFP()
331 unsigned TempReg = createResultReg(RC); in materializeGV() local
332 emitInst(Mips::ADDiu, TempReg) in materializeGV()
335 DestReg = TempReg; in materializeGV()
510 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in emitCmp() local
511 emitInst(Mips::XOR, TempReg).addReg(LeftReg).addReg(RightReg); in emitCmp()
512 emitInst(Mips::SLTiu, ResultReg).addReg(TempReg).addImm(1); in emitCmp()
516 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in emitCmp() local
517 emitInst(Mips::XOR, TempReg).addReg(LeftReg).addReg(RightReg); in emitCmp()
518 emitInst(Mips::SLTu, ResultReg).addReg(Mips::ZERO).addReg(TempReg); in emitCmp()
530 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in emitCmp() local
531 emitInst(Mips::SLTu, TempReg).addReg(LeftReg).addReg(RightReg); in emitCmp()
532 emitInst(Mips::XORi, ResultReg).addReg(TempReg).addImm(1); in emitCmp()
536 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in emitCmp() local
537 emitInst(Mips::SLTu, TempReg).addReg(RightReg).addReg(LeftReg); in emitCmp()
538 emitInst(Mips::XORi, ResultReg).addReg(TempReg).addImm(1); in emitCmp()
550 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in emitCmp() local
551 emitInst(Mips::SLT, TempReg).addReg(LeftReg).addReg(RightReg); in emitCmp()
552 emitInst(Mips::XORi, ResultReg).addReg(TempReg).addImm(1); in emitCmp()
556 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in emitCmp() local
557 emitInst(Mips::SLT, TempReg).addReg(RightReg).addReg(LeftReg); in emitCmp()
558 emitInst(Mips::XORi, ResultReg).addReg(TempReg).addImm(1); in emitCmp()
926 unsigned TempReg = createResultReg(&Mips::FGR32RegClass); in selectFPToInt() local
935 emitInst(Opc, TempReg).addReg(SrcReg); in selectFPToInt()
937 emitInst(Mips::MFC1, DestReg).addReg(TempReg); in selectFPToInt()
1327 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in emitIntSExt32r1() local
1328 emitInst(Mips::SLL, TempReg).addReg(SrcReg).addImm(ShiftAmt); in emitIntSExt32r1()
1329 emitInst(Mips::SRA, DestReg).addReg(TempReg).addImm(ShiftAmt); in emitIntSExt32r1()
1434 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in getRegEnsuringSimpleIntegerWidening() local
1435 if (!emitIntExt(VMVT, VReg, MVT::i32, TempReg, IsUnsigned)) in getRegEnsuringSimpleIntegerWidening()
1437 VReg = TempReg; in getRegEnsuringSimpleIntegerWidening()
1444 unsigned TempReg = in simplifyAddress() local
1447 emitInst(Mips::ADDu, DestReg).addReg(TempReg).addReg(Addr.getReg()); in simplifyAddress()