253   setOperationAction(ISD::FP_TO_SINT, MVT::i32, Custom);  in PPCTargetLowering()
354     setOperationAction(ISD::FP_TO_SINT, MVT::i64, Custom);  in PPCTargetLowering()
372       setOperationAction(ISD::FP_TO_SINT, MVT::i64, Custom);  in PPCTargetLowering()
378     setOperationAction(ISD::FP_TO_SINT, MVT::i32, Custom);  in PPCTargetLowering()
497     setOperationAction(ISD::FP_TO_SINT, MVT::v4i32, Legal);  in PPCTargetLowering()
610       setOperationAction(ISD::FP_TO_SINT, MVT::v2i64, Legal);  in PPCTargetLowering()
654     setOperationAction(ISD::FP_TO_SINT , MVT::v4f64, Legal);  in PPCTargetLowering()
704     setOperationAction(ISD::FP_TO_SINT , MVT::v4f32, Legal);  in PPCTargetLowering()
5870         Op.getOpcode() == ISD::FP_TO_SINT  in LowerFP_TO_INTForReuse()
5876     assert((Op.getOpcode() == ISD::FP_TO_SINT || Subtarget.hasFPCVT()) &&  in LowerFP_TO_INTForReuse()
5878     Tmp = DAG.getNode(Op.getOpcode()==ISD::FP_TO_SINT ? PPCISD::FCTIDZ :  in LowerFP_TO_INTForReuse()
5886     (Op.getOpcode() == ISD::FP_TO_SINT || Subtarget.hasFPCVT());  in LowerFP_TO_INTForReuse()
5934         Op.getOpcode() == ISD::FP_TO_SINT  in LowerFP_TO_INTDirectMove()
5941     assert((Op.getOpcode() == ISD::FP_TO_SINT || Subtarget.hasFPCVT()) &&  in LowerFP_TO_INTDirectMove()
5943     Tmp = DAG.getNode(Op.getOpcode()==ISD::FP_TO_SINT ? PPCISD::FCTIDZ :  in LowerFP_TO_INTDirectMove()
5980        Op.getOpcode() == ISD::FP_TO_SINT) &&  in canReuseLoadAddress()
7688   case ISD::FP_TO_SINT:         return LowerFP_TO_INT(Op, DAG,  in LowerOperation()
7782   case ISD::FP_TO_SINT:  in ReplaceNodeResults()
9725       (Op.getOperand(0).getOpcode() == ISD::FP_TO_SINT)) {  in combineFPToIntToFP()
9733       Op.getOperand(0).getOpcode() == ISD::FP_TO_SINT ? PPCISD::FCTIDZ :  in combineFPToIntToFP()
9889         N->getOperand(1).getOpcode() == ISD::FP_TO_SINT &&  in PerformDAGCombine()