Lines Matching refs:UnitSize
1147 static bool isVMerge(ShuffleVectorSDNode *N, unsigned UnitSize, in isVMerge() argument
1151 assert((UnitSize == 1 || UnitSize == 2 || UnitSize == 4) && in isVMerge()
1154 for (unsigned i = 0; i != 8/UnitSize; ++i) // Step over units in isVMerge()
1155 for (unsigned j = 0; j != UnitSize; ++j) { // Step over bytes within unit in isVMerge()
1156 if (!isConstantOrUndef(N->getMaskElt(i*UnitSize*2+j), in isVMerge()
1157 LHSStart+j+i*UnitSize) || in isVMerge()
1158 !isConstantOrUndef(N->getMaskElt(i*UnitSize*2+UnitSize+j), in isVMerge()
1159 RHSStart+j+i*UnitSize)) in isVMerge()
1171 bool PPC::isVMRGLShuffleMask(ShuffleVectorSDNode *N, unsigned UnitSize, in isVMRGLShuffleMask() argument
1175 return isVMerge(N, UnitSize, 0, 0); in isVMRGLShuffleMask()
1177 return isVMerge(N, UnitSize, 0, 16); in isVMRGLShuffleMask()
1182 return isVMerge(N, UnitSize, 8, 8); in isVMRGLShuffleMask()
1184 return isVMerge(N, UnitSize, 8, 24); in isVMRGLShuffleMask()
1196 bool PPC::isVMRGHShuffleMask(ShuffleVectorSDNode *N, unsigned UnitSize, in isVMRGHShuffleMask() argument
1200 return isVMerge(N, UnitSize, 8, 8); in isVMRGHShuffleMask()
1202 return isVMerge(N, UnitSize, 8, 24); in isVMRGHShuffleMask()
1207 return isVMerge(N, UnitSize, 0, 0); in isVMRGHShuffleMask()
1209 return isVMerge(N, UnitSize, 0, 16); in isVMRGHShuffleMask()