87 EVT AMDGPUTargetLowering::getEquivalentMemType(LLVMContext &Ctx, EVT VT) {  in getEquivalentMemType()
97 EVT AMDGPUTargetLowering::getEquivalentLoadRegType(LLVMContext &Ctx, EVT VT) {  in getEquivalentLoadRegType()
105 AMDGPUTargetLowering::AMDGPUTargetLowering(TargetMachine &TM,  in AMDGPUTargetLowering()  function in AMDGPUTargetLowering
429 MVT AMDGPUTargetLowering::getVectorIdxTy() const {  in getVectorIdxTy()
433 bool AMDGPUTargetLowering::isSelectSupported(SelectSupportKind SelType) const {  in isSelectSupported()
439 bool AMDGPUTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT) const {  in isFPImmLegal()
445 bool AMDGPUTargetLowering::ShouldShrinkFPConstant(EVT VT) const {  in ShouldShrinkFPConstant()
450 bool AMDGPUTargetLowering::shouldReduceLoadWidth(SDNode *N,  in shouldReduceLoadWidth()
473 bool AMDGPUTargetLowering::isLoadBitCastBeneficial(EVT LoadTy,  in isLoadBitCastBeneficial()
490 bool AMDGPUTargetLowering::isCheapToSpeculateCttz() const {  in isCheapToSpeculateCttz()
494 bool AMDGPUTargetLowering::isCheapToSpeculateCtlz() const {  in isCheapToSpeculateCtlz()
502 bool AMDGPUTargetLowering::isFAbsFree(EVT VT) const {  in isFAbsFree()
507 bool AMDGPUTargetLowering::isFNegFree(EVT VT) const {  in isFNegFree()
512 bool AMDGPUTargetLowering::isTruncateFree(EVT Source, EVT Dest) const {  in isTruncateFree()
517 bool AMDGPUTargetLowering::isTruncateFree(Type *Source, Type *Dest) const {  in isTruncateFree()
523 bool AMDGPUTargetLowering::isZExtFree(Type *Src, Type *Dest) const {  in isZExtFree()
531 bool AMDGPUTargetLowering::isZExtFree(EVT Src, EVT Dest) const {  in isZExtFree()
539 bool AMDGPUTargetLowering::isZExtFree(SDValue Val, EVT VT2) const {  in isZExtFree()
543 bool AMDGPUTargetLowering::isNarrowingProfitable(EVT SrcVT, EVT DestVT) const {  in isNarrowingProfitable()
557 void AMDGPUTargetLowering::AnalyzeFormalArguments(CCState &State,  in AnalyzeFormalArguments()
563 SDValue AMDGPUTargetLowering::LowerReturn(  in LowerReturn()
577 SDValue AMDGPUTargetLowering::LowerCall(CallLoweringInfo &CLI,  in LowerCall()
596 SDValue AMDGPUTargetLowering::LowerOperation(SDValue Op,  in LowerOperation()
626 void AMDGPUTargetLowering::ReplaceNodeResults(SDNode *N,  in ReplaceNodeResults()
671 SDValue AMDGPUTargetLowering::LowerConstantInitializer(const Constant* Init,  in LowerConstantInitializer()
760 SDValue AMDGPUTargetLowering::LowerGlobalAddress(AMDGPUMachineFunction* MFI,  in LowerGlobalAddress()
839 SDValue AMDGPUTargetLowering::LowerCONCAT_VECTORS(SDValue Op,  in LowerCONCAT_VECTORS()
851 SDValue AMDGPUTargetLowering::LowerEXTRACT_SUBVECTOR(SDValue Op,  in LowerEXTRACT_SUBVECTOR()
863 SDValue AMDGPUTargetLowering::LowerFrameIndex(SDValue Op,  in LowerFrameIndex()
877 SDValue AMDGPUTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,  in LowerINTRINSIC_WO_CHAIN()
1041 SDValue AMDGPUTargetLowering::LowerIntrinsicIABS(SDValue Op,  in LowerIntrinsicIABS()
1053 SDValue AMDGPUTargetLowering::LowerIntrinsicLRP(SDValue Op,  in LowerIntrinsicLRP()
1068 SDValue AMDGPUTargetLowering::CombineFMinMaxLegacy(SDLoc DL,  in CombineFMinMaxLegacy()
1148 SDValue AMDGPUTargetLowering::CombineIMinMax(SDLoc DL,  in CombineIMinMax()
1186 SDValue AMDGPUTargetLowering::ScalarizeVectorLoad(const SDValue Op,  in ScalarizeVectorLoad()
1226 SDValue AMDGPUTargetLowering::SplitVectorLoad(const SDValue Op,  in SplitVectorLoad()
1275 SDValue AMDGPUTargetLowering::MergeVectorStore(const SDValue &Op,  in MergeVectorStore()
1333 SDValue AMDGPUTargetLowering::ScalarizeVectorStore(SDValue Op,  in ScalarizeVectorStore()
1365 SDValue AMDGPUTargetLowering::SplitVectorStore(SDValue Op,  in SplitVectorStore()
1415 SDValue AMDGPUTargetLowering::LowerLOAD(SDValue Op, SelectionDAG &DAG) const {  in LowerLOAD()
1482 SDValue AMDGPUTargetLowering::LowerSTORE(SDValue Op, SelectionDAG &DAG) const {  in LowerSTORE()
1484   SDValue Result = AMDGPUTargetLowering::MergeVectorStore(Op, DAG);  in LowerSTORE()
1542 SDValue AMDGPUTargetLowering::LowerDIVREM24(SDValue Op, SelectionDAG &DAG, bool sign) const {  in LowerDIVREM24()
1639 void AMDGPUTargetLowering::LowerUDIVREM64(SDValue Op,  in LowerUDIVREM64()
1714 SDValue AMDGPUTargetLowering::LowerUDIVREM(SDValue Op,  in LowerUDIVREM()
1834 SDValue AMDGPUTargetLowering::LowerSDIVREM(SDValue Op,  in LowerSDIVREM()
1895 SDValue AMDGPUTargetLowering::LowerFREM(SDValue Op, SelectionDAG &DAG) const {  in LowerFREM()
1908 SDValue AMDGPUTargetLowering::LowerFCEIL(SDValue Op, SelectionDAG &DAG) const {  in LowerFCEIL()
1945 SDValue AMDGPUTargetLowering::LowerFTRUNC(SDValue Op, SelectionDAG &DAG) const {  in LowerFTRUNC()
1994 SDValue AMDGPUTargetLowering::LowerFRINT(SDValue Op, SelectionDAG &DAG) const {  in LowerFRINT()
2018 SDValue AMDGPUTargetLowering::LowerFNEARBYINT(SDValue Op, SelectionDAG &DAG) const {  in LowerFNEARBYINT()
2026 SDValue AMDGPUTargetLowering::LowerFROUND32(SDValue Op, SelectionDAG &DAG) const {  in LowerFROUND32()
2051 SDValue AMDGPUTargetLowering::LowerFROUND64(SDValue Op, SelectionDAG &DAG) const {  in LowerFROUND64()
2106 SDValue AMDGPUTargetLowering::LowerFROUND(SDValue Op, SelectionDAG &DAG) const {  in LowerFROUND()
2118 SDValue AMDGPUTargetLowering::LowerFFLOOR(SDValue Op, SelectionDAG &DAG) const {  in LowerFFLOOR()
2141 SDValue AMDGPUTargetLowering::LowerINT_TO_FP64(SDValue Op, SelectionDAG &DAG,  in LowerINT_TO_FP64()
2164 SDValue AMDGPUTargetLowering::LowerUINT_TO_FP(SDValue Op,  in LowerUINT_TO_FP()
2190 SDValue AMDGPUTargetLowering::LowerSINT_TO_FP(SDValue Op,  in LowerSINT_TO_FP()
2199 SDValue AMDGPUTargetLowering::LowerFP64_TO_INT(SDValue Op, SelectionDAG &DAG,  in LowerFP64_TO_INT()
2228 SDValue AMDGPUTargetLowering::LowerFP_TO_SINT(SDValue Op,  in LowerFP_TO_SINT()
2238 SDValue AMDGPUTargetLowering::LowerFP_TO_UINT(SDValue Op,  in LowerFP_TO_UINT()
2248 SDValue AMDGPUTargetLowering::LowerSIGN_EXTEND_INREG(SDValue Op,  in LowerSIGN_EXTEND_INREG()
2332 SDValue AMDGPUTargetLowering::performStoreCombine(SDNode *N,  in performStoreCombine()
2370 SDValue AMDGPUTargetLowering::performMulCombine(SDNode *N,  in performMulCombine()
2401 SDValue AMDGPUTargetLowering::PerformDAGCombine(SDNode *N,  in PerformDAGCombine()
2535 void AMDGPUTargetLowering::getOriginalFunctionArgs(  in getOriginalFunctionArgs()
2567 bool AMDGPUTargetLowering::isHWTrueValue(SDValue Op) const {  in isHWTrueValue()
2577 bool AMDGPUTargetLowering::isHWFalseValue(SDValue Op) const {  in isHWFalseValue()
2587 SDValue AMDGPUTargetLowering::CreateLiveInRegister(SelectionDAG &DAG,  in CreateLiveInRegister()
2604 const char* AMDGPUTargetLowering::getTargetNodeName(unsigned Opcode) const {  in getTargetNodeName()
2671 SDValue AMDGPUTargetLowering::getRsqrtEstimate(SDValue Operand,  in getRsqrtEstimate()
2689 SDValue AMDGPUTargetLowering::getRecipEstimate(SDValue Operand,  in getRecipEstimate()
2726 void AMDGPUTargetLowering::computeKnownBitsForTargetNode(  in computeKnownBitsForTargetNode()
2783 unsigned AMDGPUTargetLowering::ComputeNumSignBitsForTargetNode(  in ComputeNumSignBitsForTargetNode()