Lines Matching refs:isRegClass
187 bool isRegClass(unsigned RCID) const { in isRegClass() function in __anondcc3d2080111::AMDGPUOperand
192 return isInlineImm() || (isReg() && isRegClass(AMDGPU::SReg_32RegClassID)); in isSCSrc32()
196 return isImm() || (isReg() && isRegClass(AMDGPU::SReg_32RegClassID)); in isSSrc32()
201 (isReg() && isRegClass(AMDGPU::SReg_64RegClassID)); in isSSrc64()
205 return isInlineImm() || (isReg() && isRegClass(AMDGPU::VS_32RegClassID)); in isVCSrc32()
209 return isInlineImm() || (isReg() && isRegClass(AMDGPU::VS_64RegClassID)); in isVCSrc64()
213 return isImm() || (isReg() && isRegClass(AMDGPU::VS_32RegClassID)); in isVSrc32()
217 return isImm() || (isReg() && isRegClass(AMDGPU::VS_64RegClassID)); in isVSrc64()
1194 if (DstOp.isReg() && DstOp.isRegClass(AMDGPU::SGPR_64RegClassID)) in isVOP3()
1202 if (Src1Op.getReg() && (Src1Op.isRegClass(AMDGPU::SReg_32RegClassID) || in isVOP3()
1203 Src1Op.isRegClass(AMDGPU::SReg_64RegClassID))) in isVOP3()