736     unsigned Src1 = MI->getOperand(2).getReg();  in expandPostRAPseudo()  local
741         .addReg(RI.getSubReg(Src1, AMDGPU::sub0))  in expandPostRAPseudo()
745         .addReg(RI.getSubReg(Src1, AMDGPU::sub1))  in expandPostRAPseudo()
773   MachineOperand &Src1 = MI->getOperand(Src1Idx);  in commuteInstruction()  local
777       (!isOperandLegal(MI, Src0Idx, &Src1) ||  in commuteInstruction()
782   if (!Src1.isReg()) {  in commuteInstruction()
784     if (NewMI || !Src1.isImm() ||  in commuteInstruction()
810     if (Src1.isImm())  in commuteInstruction()
811       Src0.ChangeToImmediate(Src1.getImm());  in commuteInstruction()
815     Src1.ChangeToRegister(Reg, false);  in commuteInstruction()
816     Src1.setSubReg(SubReg);  in commuteInstruction()
919     MachineOperand *Src1 = getNamedOperand(*UseMI, AMDGPU::OpName::src1);  in FoldImmediate()  local
925       if (!Src1->isReg() ||  in FoldImmediate()
926           (Src1->isReg() && RI.isSGPRClass(MRI->getRegClass(Src1->getReg()))))  in FoldImmediate()
953       unsigned Src1Reg = Src1->getReg();  in FoldImmediate()
954       unsigned Src1SubReg = Src1->getSubReg();  in FoldImmediate()
959       Src1->setReg(Src2Reg);  in FoldImmediate()
960       Src1->setSubReg(Src2SubReg);  in FoldImmediate()
982       if (!Src1->isReg() ||  in FoldImmediate()
983           (Src1->isReg() && RI.isSGPRClass(MRI->getRegClass(Src1->getReg()))))  in FoldImmediate()
1361     const MachineOperand &Src1 = MI->getOperand(Src1Idx);  in verifyInstruction()  local
1363     if (Src0.isReg() && Src1.isReg() && Src2.isReg()) {  in verifyInstruction()
1364       if (!compareMachineOp(Src0, Src1) &&  in verifyInstruction()
2385   MachineOperand &Src1 = Inst->getOperand(2);  in splitScalar64BitBinaryOp()  local
2396   const TargetRegisterClass *Src1RC = Src1.isReg() ?  in splitScalar64BitBinaryOp()
2397     MRI.getRegClass(Src1.getReg()) :  in splitScalar64BitBinaryOp()
2404   MachineOperand SrcReg1Sub0 = buildExtractSubRegOrImm(MII, MRI, Src1, Src1RC,  in splitScalar64BitBinaryOp()
2417   MachineOperand SrcReg1Sub1 = buildExtractSubRegOrImm(MII, MRI, Src1, Src1RC,  in splitScalar64BitBinaryOp()