Lines Matching refs:vdata

94      SDTCisVT<1, iAny>,   // vdata(VGPR)
1918   (ins regClass:$vdata, u16imm:$offset, i1imm:$offen, i1imm:$idxen, i1imm:$glc,
1921   opName#" $vdata, $offset, $offen, $idxen, $glc, $addr64, $dfmt,"
2069         (ins rc:$vdata, SReg_128:$srsrc, VReg_64:$vaddr,
2071         name#" $vdata, $vaddr, $srsrc, $soffset addr64"#"$offset"#"$slc", [], 0
2076         (ins rc:$vdata, SReg_128:$srsrc, SCSrc_32:$soffset, mbuf_offset:$offset,
2078         name#" $vdata, $srsrc, $soffset"#"$offset"#"$slc", [], 0
2083     let glc = 1, Constraints = "$vdata = $vdata_in",
2087         op, name#"_rtn_addr64", (outs rc:$vdata),
2090         name#" $vdata, $vaddr, $srsrc, $soffset addr64"#"$offset"#" glc"#"$slc",
2091         [(set vt:$vdata,
2097         op, name#"_rtn_offset", (outs rc:$vdata),
2100         name#" $vdata, $srsrc, $soffset"#"$offset"#" glc $slc",
2101         [(set vt:$vdata,
2117       defm _OFFSET : MUBUF_m <op, name#"_offset", (outs regClass:$vdata),
2120                            name#" $vdata, $srsrc, $soffset"#"$offset"#"$glc"#"$slc"#"$tfe",
2121                            [(set load_vt:$vdata, (ld (MUBUFOffset v4i32:$srsrc,
2127       defm _OFFEN  : MUBUF_m <op, name#"_offen", (outs regClass:$vdata),
2131 …                name#" $vdata, $vaddr, $srsrc, $soffset offen"#"$offset"#"$glc"#"$slc"#"$tfe", []>;
2135       defm _IDXEN  : MUBUF_m <op, name#"_idxen", (outs regClass:$vdata),
2139 …                name#" $vdata, $vaddr, $srsrc, $soffset idxen"#"$offset"#"$glc"#"$slc"#"$tfe", []>;
2143       defm _BOTHEN : MUBUF_m <op, name#"_bothen", (outs regClass:$vdata),
2146 …          name#" $vdata, $vaddr, $srsrc, $soffset idxen offen"#"$offset"#"$glc"#"$slc"#"$tfe", []>;
2150       defm _ADDR64 : MUBUFAddr64_m <op, name#"_addr64", (outs regClass:$vdata),
2154                            name#" $vdata, $vaddr, $srsrc, $soffset addr64"#"$offset"#
2156                            [(set load_vt:$vdata, (ld (MUBUFAddr64 v4i32:$srsrc,
2168                     (ins vdataClass:$vdata, VGPR_32:$vaddr, SReg_128:$srsrc, SCSrc_32:$soffset,
2171                     name#" $vdata, $vaddr, $srsrc, $soffset"#"$offen"#"$idxen"#"$offset"#
2176                               (ins vdataClass:$vdata, SReg_128:$srsrc, SCSrc_32:$soffset,
2178                               name#" $vdata, $srsrc, $soffset"#"$offset"#"$glc"#"$slc"#"$tfe",
2179                               [(st store_vt:$vdata, (MUBUFOffset v4i32:$srsrc, i32:$soffset,
2185                              (ins vdataClass:$vdata, VGPR_32:$vaddr, SReg_128:$srsrc,
2188                              name#" $vdata, $vaddr, $srsrc, $soffset offen"#"$offset"#
2194                            (ins vdataClass:$vdata, VGPR_32:$vaddr, SReg_128:$srsrc,
2197 …                name#" $vdata, $vaddr, $srsrc, $soffset idxen"#"$offset"#"$glc"#"$slc"#"$tfe", []>;
2202 …                        (ins vdataClass:$vdata, VReg_64:$vaddr, SReg_128:$srsrc, SCSrc_32:$soffset,
2204 …          name#" $vdata, $vaddr, $srsrc, $soffset idxen offen"#"$offset"#"$glc"#"$slc"#"$tfe", []>;
2209                                     (ins vdataClass:$vdata, VReg_64:$vaddr, SReg_128:$srsrc,
2213                                     name#" $vdata, $vaddr, $srsrc, $soffset addr64"#
2215                                     [(st store_vt:$vdata,
2258   (outs dst_rc:$vdata),
2262   asm#" $vdata, $dmask, $unorm, $glc, $da, $r128,"
2293   (outs dst_rc:$vdata),
2297   asm#" $vdata, $dmask, $unorm, $glc, $da, $r128,"
2339   (outs dst_rc:$vdata),
2343   asm#" $vdata, $dmask, $unorm, $glc, $da, $r128,"