Lines Matching refs:RegKind
94 unsigned RegKind : 8; member
161 createMem(RegisterKind RegKind, unsigned Base, const MCExpr *Disp, in createMem() argument
165 Op->Mem.RegKind = RegKind; in createMem()
194 bool isReg(RegisterKind RegKind) const { in isReg()
195 return Kind == KindReg && Reg.Kind == RegKind; in isReg()
229 bool isMem(RegisterKind RegKind, MemoryKind MemKind) const { in isMem() argument
231 Mem.RegKind == RegKind && in isMem()
235 bool isMemDisp12(RegisterKind RegKind, MemoryKind MemKind) const { in isMemDisp12() argument
236 return isMem(RegKind, MemKind) && inRange(Mem.Disp, 0, 0xfff); in isMemDisp12()
238 bool isMemDisp20(RegisterKind RegKind, MemoryKind MemKind) const { in isMemDisp20() argument
239 return isMem(RegKind, MemKind) && inRange(Mem.Disp, -524288, 524287); in isMemDisp20()
241 bool isMemDisp12Len8(RegisterKind RegKind) const { in isMemDisp12Len8()
242 return isMemDisp12(RegKind, BDLMem) && inRange(Mem.Length, 1, 0x100); in isMemDisp12Len8()
351 const unsigned *Regs, RegisterKind RegKind);
354 const unsigned *Regs, RegisterKind RegKind,
534 RegisterKind RegKind) { in parseAddress() argument
549 if (parseRegister(Reg, RegGR, Regs, RegKind)) in parseAddress()
565 if (parseRegister(Reg, RegGR, Regs, RegKind)) in parseAddress()
582 RegisterKind RegKind, MemoryKind MemKind) { in parseAddress() argument
587 if (parseAddress(Base, Disp, Index, Length, Regs, RegKind)) in parseAddress()
610 Operands.push_back(SystemZOperand::createMem(RegKind, Base, Disp, Index, in parseAddress()