Lines Matching refs:VA

651                                    CCValAssign &VA, SDValue Chain,  in convertLocVTToValVT()  argument
655 if (VA.getLocInfo() == CCValAssign::SExt) in convertLocVTToValVT()
656 Value = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), Value, in convertLocVTToValVT()
657 DAG.getValueType(VA.getValVT())); in convertLocVTToValVT()
658 else if (VA.getLocInfo() == CCValAssign::ZExt) in convertLocVTToValVT()
659 Value = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Value, in convertLocVTToValVT()
660 DAG.getValueType(VA.getValVT())); in convertLocVTToValVT()
662 if (VA.isExtInLoc()) in convertLocVTToValVT()
663 Value = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), Value); in convertLocVTToValVT()
664 else if (VA.getLocInfo() == CCValAssign::Indirect) in convertLocVTToValVT()
665 Value = DAG.getLoad(VA.getValVT(), DL, Chain, Value, in convertLocVTToValVT()
668 assert(VA.getLocInfo() == CCValAssign::Full && "Unsupported getLocInfo"); in convertLocVTToValVT()
676 CCValAssign &VA, SDValue Value) { in convertValVTToLocVT() argument
677 switch (VA.getLocInfo()) { in convertValVTToLocVT()
679 return DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), Value); in convertValVTToLocVT()
681 return DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), Value); in convertValVTToLocVT()
683 return DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), Value); in convertValVTToLocVT()
713 CCValAssign &VA = ArgLocs[I]; in LowerFormalArguments() local
714 EVT LocVT = VA.getLocVT(); in LowerFormalArguments()
715 if (VA.isRegLoc()) { in LowerFormalArguments()
741 MRI.addLiveIn(VA.getLocReg(), VReg); in LowerFormalArguments()
744 assert(VA.isMemLoc() && "Argument not register or memory"); in LowerFormalArguments()
748 VA.getLocMemOffset(), true); in LowerFormalArguments()
755 if (VA.getLocVT() == MVT::i32 || VA.getLocVT() == MVT::f32) in LowerFormalArguments()
764 InVals.push_back(convertLocVTToValVT(DAG, DL, VA, Chain, ArgValue)); in LowerFormalArguments()
814 CCValAssign &VA = ArgLocs[I]; in canUseSiblingCall() local
815 if (VA.getLocInfo() == CCValAssign::Indirect) in canUseSiblingCall()
817 if (!VA.isRegLoc()) in canUseSiblingCall()
819 unsigned Reg = VA.getLocReg(); in canUseSiblingCall()
865 CCValAssign &VA = ArgLocs[I]; in LowerCall() local
868 if (VA.getLocInfo() == CCValAssign::Indirect) { in LowerCall()
870 SDValue SpillSlot = DAG.CreateStackTemporary(VA.getValVT()); in LowerCall()
877 ArgValue = convertValVTToLocVT(DAG, DL, VA, ArgValue); in LowerCall()
879 if (VA.isRegLoc()) in LowerCall()
881 RegsToPass.push_back(std::make_pair(VA.getLocReg(), ArgValue)); in LowerCall()
883 assert(VA.isMemLoc() && "Argument not register or memory"); in LowerCall()
889 unsigned Offset = SystemZMC::CallFrameSize + VA.getLocMemOffset(); in LowerCall()
890 if (VA.getLocVT() == MVT::i32 || VA.getLocVT() == MVT::f32) in LowerCall()
971 CCValAssign &VA = RetLocs[I]; in LowerCall() local
974 SDValue RetValue = DAG.getCopyFromReg(Chain, DL, VA.getLocReg(), in LowerCall()
975 VA.getLocVT(), Glue); in LowerCall()
981 InVals.push_back(convertLocVTToValVT(DAG, DL, VA, Chain, RetValue)); in LowerCall()
1009 CCValAssign &VA = RetLocs[I]; in LowerReturn() local
1013 assert(VA.isRegLoc() && "Can only return in registers!"); in LowerReturn()
1016 RetValue = convertValVTToLocVT(DAG, DL, VA, RetValue); in LowerReturn()
1019 unsigned Reg = VA.getLocReg(); in LowerReturn()
1022 RetOps.push_back(DAG.getRegister(Reg, VA.getLocVT())); in LowerReturn()