Lines Matching refs:X86
118 bool IsStackReg(unsigned Reg) { return Reg == X86::RSP || Reg == X86::ESP; } in IsStackReg()
158 if (Reg != X86::NoRegister) in AddBusyReg()
168 static const MCPhysReg Candidates[] = { X86::RBP, X86::RAX, X86::RBX, in ChooseFrameReg()
169 X86::RCX, X86::RDX, X86::RDI, in ChooseFrameReg()
170 X86::RSI }; in ChooseFrameReg()
175 return X86::NoRegister; in ChooseFrameReg()
180 return Reg == X86::NoRegister ? Reg : getX86SubSuperRegister(Reg, VT); in convReg()
199 EmitInstruction(Out, MCInstBuilder(X86::REP_PREFIX)); in InstrumentAndEmitInstruction()
203 RepPrefix = (Inst.getOpcode() == X86::REP_PREFIX); in InstrumentAndEmitInstruction()
248 Inst.setOpcode(VT == MVT::i32 ? X86::LEA32r : X86::LEA64r); in EmitLEA()
265 return (STI.getFeatureBits() & X86::Mode64Bit) != 0; in is64BitMode()
268 return (STI.getFeatureBits() & X86::Mode32Bit) != 0; in is32BitMode()
271 return (STI.getFeatureBits() & X86::Mode16Bit) != 0; in is16BitMode()
307 RegisterContext RegCtx(X86::RDX /* AddressReg */, X86::RAX /* ShadowReg */, in InstrumentMOVSBase()
309 ? X86::RBX in InstrumentMOVSBase()
310 : X86::NoRegister /* ScratchReg */); in InstrumentMOVSBase()
364 case X86::MOVSB: in InstrumentMOVS()
367 case X86::MOVSW: in InstrumentMOVS()
370 case X86::MOVSL: in InstrumentMOVS()
373 case X86::MOVSQ: in InstrumentMOVS()
391 case X86::MOV8mi: in InstrumentMOV()
392 case X86::MOV8mr: in InstrumentMOV()
393 case X86::MOV8rm: in InstrumentMOV()
396 case X86::MOV16mi: in InstrumentMOV()
397 case X86::MOV16mr: in InstrumentMOV()
398 case X86::MOV16rm: in InstrumentMOV()
401 case X86::MOV32mi: in InstrumentMOV()
402 case X86::MOV32mr: in InstrumentMOV()
403 case X86::MOV32rm: in InstrumentMOV()
406 case X86::MOV64mi32: in InstrumentMOV()
407 case X86::MOV64mr: in InstrumentMOV()
408 case X86::MOV64rm: in InstrumentMOV()
411 case X86::MOVAPDmr: in InstrumentMOV()
412 case X86::MOVAPSmr: in InstrumentMOV()
413 case X86::MOVAPDrm: in InstrumentMOV()
414 case X86::MOVAPSrm: in InstrumentMOV()
429 X86::RDI /* AddressReg */, X86::RAX /* ShadowReg */, in InstrumentMOV()
430 IsSmallMemAccess(AccessSize) ? X86::RCX in InstrumentMOV()
431 : X86::NoRegister /* ScratchReg */); in InstrumentMOV()
514 if (FrameReg == X86::NoRegister) in GetFrameReg()
520 EmitInstruction(Out, MCInstBuilder(X86::PUSH32r).addReg(Reg)); in SpillReg()
525 EmitInstruction(Out, MCInstBuilder(X86::POP32r).addReg(Reg)); in RestoreReg()
530 EmitInstruction(Out, MCInstBuilder(X86::PUSHF32)); in StoreFlags()
535 EmitInstruction(Out, MCInstBuilder(X86::POPF32)); in RestoreFlags()
543 assert(LocalFrameReg != X86::NoRegister); in InstrumentMemOperandPrologue()
547 if (MRI && FrameReg != X86::NoRegister) { in InstrumentMemOperandPrologue()
549 if (FrameReg == X86::ESP) { in InstrumentMemOperandPrologue()
556 MCInstBuilder(X86::MOV32rr).addReg(LocalFrameReg).addReg(FrameReg)); in InstrumentMemOperandPrologue()
564 if (RegCtx.ScratchReg(MVT::i32) != X86::NoRegister) in InstrumentMemOperandPrologue()
573 assert(LocalFrameReg != X86::NoRegister); in InstrumentMemOperandEpilogue()
576 if (RegCtx.ScratchReg(MVT::i32) != X86::NoRegister) in InstrumentMemOperandEpilogue()
582 if (Ctx.getRegisterInfo() && FrameReg != X86::NoRegister) { in InstrumentMemOperandEpilogue()
585 if (FrameReg == X86::ESP) in InstrumentMemOperandEpilogue()
606 EmitInstruction(Out, MCInstBuilder(X86::CLD)); in EmitCallAsanReport()
607 EmitInstruction(Out, MCInstBuilder(X86::MMX_EMMS)); in EmitCallAsanReport()
609 EmitInstruction(Out, MCInstBuilder(X86::AND64ri8) in EmitCallAsanReport()
610 .addReg(X86::ESP) in EmitCallAsanReport()
611 .addReg(X86::ESP) in EmitCallAsanReport()
614 Out, MCInstBuilder(X86::PUSH32r).addReg(RegCtx.AddressReg(MVT::i32))); in EmitCallAsanReport()
620 EmitInstruction(Out, MCInstBuilder(X86::CALLpcrel32).addExpr(FnExpr)); in EmitCallAsanReport()
631 assert(RegCtx.ScratchReg(MVT::i32) != X86::NoRegister); in InstrumentMemOperandSmall()
636 EmitInstruction(Out, MCInstBuilder(X86::MOV32rr).addReg(ShadowRegI32).addReg( in InstrumentMemOperandSmall()
638 EmitInstruction(Out, MCInstBuilder(X86::SHR32ri) in InstrumentMemOperandSmall()
645 Inst.setOpcode(X86::MOV8rm); in InstrumentMemOperandSmall()
656 Out, MCInstBuilder(X86::TEST8rr).addReg(ShadowRegI8).addReg(ShadowRegI8)); in InstrumentMemOperandSmall()
659 EmitInstruction(Out, MCInstBuilder(X86::JE_1).addExpr(DoneExpr)); in InstrumentMemOperandSmall()
661 EmitInstruction(Out, MCInstBuilder(X86::MOV32rr).addReg(ScratchRegI32).addReg( in InstrumentMemOperandSmall()
663 EmitInstruction(Out, MCInstBuilder(X86::AND32ri) in InstrumentMemOperandSmall()
681 EmitInstruction(Out, MCInstBuilder(X86::ADD32ri8) in InstrumentMemOperandSmall()
690 MCInstBuilder(X86::MOVSX32rr8).addReg(ShadowRegI32).addReg(ShadowRegI8)); in InstrumentMemOperandSmall()
691 EmitInstruction(Out, MCInstBuilder(X86::CMP32rr).addReg(ScratchRegI32).addReg( in InstrumentMemOperandSmall()
693 EmitInstruction(Out, MCInstBuilder(X86::JL_1).addExpr(DoneExpr)); in InstrumentMemOperandSmall()
707 EmitInstruction(Out, MCInstBuilder(X86::MOV32rr).addReg(ShadowRegI32).addReg( in InstrumentMemOperandLarge()
709 EmitInstruction(Out, MCInstBuilder(X86::SHR32ri) in InstrumentMemOperandLarge()
718 Inst.setOpcode(X86::CMP8mi); in InstrumentMemOperandLarge()
721 Inst.setOpcode(X86::CMP16mi); in InstrumentMemOperandLarge()
734 EmitInstruction(Out, MCInstBuilder(X86::JE_1).addExpr(DoneExpr)); in InstrumentMemOperandLarge()
749 Out, MCInstBuilder(X86::TEST32rr).addReg(X86::ECX).addReg(X86::ECX)); in InstrumentMOVSImpl()
750 EmitInstruction(Out, MCInstBuilder(X86::JE_1).addExpr(DoneExpr)); in InstrumentMOVSImpl()
753 InstrumentMOVSBase(X86::EDI /* DstReg */, X86::ESI /* SrcReg */, in InstrumentMOVSImpl()
754 X86::ECX /* CntReg */, AccessSize, Ctx, Out); in InstrumentMOVSImpl()
771 if (FrameReg == X86::NoRegister) in GetFrameReg()
777 EmitInstruction(Out, MCInstBuilder(X86::PUSH64r).addReg(Reg)); in SpillReg()
782 EmitInstruction(Out, MCInstBuilder(X86::POP64r).addReg(Reg)); in RestoreReg()
787 EmitInstruction(Out, MCInstBuilder(X86::PUSHF64)); in StoreFlags()
792 EmitInstruction(Out, MCInstBuilder(X86::POPF64)); in RestoreFlags()
800 assert(LocalFrameReg != X86::NoRegister); in InstrumentMemOperandPrologue()
804 if (MRI && FrameReg != X86::NoRegister) { in InstrumentMemOperandPrologue()
805 SpillReg(Out, X86::RBP); in InstrumentMemOperandPrologue()
806 if (FrameReg == X86::RSP) { in InstrumentMemOperandPrologue()
813 MCInstBuilder(X86::MOV64rr).addReg(LocalFrameReg).addReg(FrameReg)); in InstrumentMemOperandPrologue()
822 if (RegCtx.ScratchReg(MVT::i64) != X86::NoRegister) in InstrumentMemOperandPrologue()
831 assert(LocalFrameReg != X86::NoRegister); in InstrumentMemOperandEpilogue()
834 if (RegCtx.ScratchReg(MVT::i64) != X86::NoRegister) in InstrumentMemOperandEpilogue()
841 if (Ctx.getRegisterInfo() && FrameReg != X86::NoRegister) { in InstrumentMemOperandEpilogue()
844 if (FrameReg == X86::RSP) in InstrumentMemOperandEpilogue()
866 X86Operand::CreateMem(getPointerWidth(), 0, Disp, X86::RSP, 0, 1, in EmitAdjustRSP()
868 EmitLEA(*Op, MVT::i64, X86::RSP, Out); in EmitAdjustRSP()
874 EmitInstruction(Out, MCInstBuilder(X86::CLD)); in EmitCallAsanReport()
875 EmitInstruction(Out, MCInstBuilder(X86::MMX_EMMS)); in EmitCallAsanReport()
877 EmitInstruction(Out, MCInstBuilder(X86::AND64ri8) in EmitCallAsanReport()
878 .addReg(X86::RSP) in EmitCallAsanReport()
879 .addReg(X86::RSP) in EmitCallAsanReport()
882 if (RegCtx.AddressReg(MVT::i64) != X86::RDI) { in EmitCallAsanReport()
883 EmitInstruction(Out, MCInstBuilder(X86::MOV64rr).addReg(X86::RDI).addReg( in EmitCallAsanReport()
890 EmitInstruction(Out, MCInstBuilder(X86::CALL64pcrel32).addExpr(FnExpr)); in EmitCallAsanReport()
903 assert(RegCtx.ScratchReg(MVT::i32) != X86::NoRegister); in InstrumentMemOperandSmall()
908 EmitInstruction(Out, MCInstBuilder(X86::MOV64rr).addReg(ShadowRegI64).addReg( in InstrumentMemOperandSmall()
910 EmitInstruction(Out, MCInstBuilder(X86::SHR64ri) in InstrumentMemOperandSmall()
916 Inst.setOpcode(X86::MOV8rm); in InstrumentMemOperandSmall()
927 Out, MCInstBuilder(X86::TEST8rr).addReg(ShadowRegI8).addReg(ShadowRegI8)); in InstrumentMemOperandSmall()
930 EmitInstruction(Out, MCInstBuilder(X86::JE_1).addExpr(DoneExpr)); in InstrumentMemOperandSmall()
932 EmitInstruction(Out, MCInstBuilder(X86::MOV32rr).addReg(ScratchRegI32).addReg( in InstrumentMemOperandSmall()
934 EmitInstruction(Out, MCInstBuilder(X86::AND32ri) in InstrumentMemOperandSmall()
952 EmitInstruction(Out, MCInstBuilder(X86::ADD32ri8) in InstrumentMemOperandSmall()
961 MCInstBuilder(X86::MOVSX32rr8).addReg(ShadowRegI32).addReg(ShadowRegI8)); in InstrumentMemOperandSmall()
962 EmitInstruction(Out, MCInstBuilder(X86::CMP32rr).addReg(ScratchRegI32).addReg( in InstrumentMemOperandSmall()
964 EmitInstruction(Out, MCInstBuilder(X86::JL_1).addExpr(DoneExpr)); in InstrumentMemOperandSmall()
978 EmitInstruction(Out, MCInstBuilder(X86::MOV64rr).addReg(ShadowRegI64).addReg( in InstrumentMemOperandLarge()
980 EmitInstruction(Out, MCInstBuilder(X86::SHR64ri) in InstrumentMemOperandLarge()
989 Inst.setOpcode(X86::CMP8mi); in InstrumentMemOperandLarge()
992 Inst.setOpcode(X86::CMP16mi); in InstrumentMemOperandLarge()
1006 EmitInstruction(Out, MCInstBuilder(X86::JE_1).addExpr(DoneExpr)); in InstrumentMemOperandLarge()
1021 Out, MCInstBuilder(X86::TEST64rr).addReg(X86::RCX).addReg(X86::RCX)); in InstrumentMOVSImpl()
1022 EmitInstruction(Out, MCInstBuilder(X86::JE_1).addExpr(DoneExpr)); in InstrumentMOVSImpl()
1025 InstrumentMOVSBase(X86::RDI /* DstReg */, X86::RSI /* SrcReg */, in InstrumentMOVSImpl()
1026 X86::RCX /* CntReg */, AccessSize, Ctx, Out); in InstrumentMOVSImpl()
1053 return X86::NoRegister; in GetFrameRegGeneric()
1056 return X86::NoRegister; in GetFrameRegGeneric()
1059 return X86::NoRegister; in GetFrameRegGeneric()
1076 if ((STI.getFeatureBits() & X86::Mode32Bit) != 0) in CreateX86AsmInstrumentation()
1078 if ((STI.getFeatureBits() & X86::Mode64Bit) != 0) in CreateX86AsmInstrumentation()