Lines Matching refs:BaseOpc
2516 unsigned BaseOpc, CondOpc; in fastLowerIntrinsicCall() local
2520 BaseOpc = UseIncDec ? unsigned(X86ISD::INC) : unsigned(ISD::ADD); in fastLowerIntrinsicCall()
2524 BaseOpc = ISD::ADD; CondOpc = X86::SETBr; break; in fastLowerIntrinsicCall()
2526 BaseOpc = UseIncDec ? unsigned(X86ISD::DEC) : unsigned(ISD::SUB); in fastLowerIntrinsicCall()
2530 BaseOpc = ISD::SUB; CondOpc = X86::SETBr; break; in fastLowerIntrinsicCall()
2532 BaseOpc = X86ISD::SMUL; CondOpc = X86::SETOr; break; in fastLowerIntrinsicCall()
2534 BaseOpc = X86ISD::UMUL; CondOpc = X86::SETOr; break; in fastLowerIntrinsicCall()
2550 if (BaseOpc == X86ISD::INC || BaseOpc == X86ISD::DEC) { in fastLowerIntrinsicCall()
2552 bool IsDec = BaseOpc == X86ISD::DEC; in fastLowerIntrinsicCall()
2557 ResultReg = fastEmit_ri(VT, VT, BaseOpc, LHSReg, LHSIsKill, in fastLowerIntrinsicCall()
2568 ResultReg = fastEmit_rr(VT, VT, BaseOpc, LHSReg, LHSIsKill, RHSReg, in fastLowerIntrinsicCall()
2574 if (BaseOpc == X86ISD::UMUL && !ResultReg) { in fastLowerIntrinsicCall()
2585 } else if (BaseOpc == X86ISD::SMUL && !ResultReg) { in fastLowerIntrinsicCall()