Lines Matching refs:ResultReg
87 unsigned &ResultReg, unsigned Alignment = 1);
96 unsigned &ResultReg);
330 MachineMemOperand *MMO, unsigned &ResultReg, in X86FastEmitLoad() argument
402 ResultReg = createResultReg(RC); in X86FastEmitLoad()
404 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg); in X86FastEmitLoad()
524 unsigned &ResultReg) { in X86FastEmitExtend() argument
530 ResultReg = RR; in X86FastEmitExtend()
1101 unsigned ResultReg = 0; in X86SelectLoad() local
1102 if (!X86FastEmitLoad(VT, AM, createMachineMemOperandFor(LI), ResultReg, in X86SelectLoad()
1106 updateValueMap(I, ResultReg); in X86SelectLoad()
1199 unsigned ResultReg = 0; in X86SelectCmp() local
1203 ResultReg = createResultReg(&X86::GR32RegClass); in X86SelectCmp()
1205 ResultReg); in X86SelectCmp()
1206 ResultReg = fastEmitInst_extractsubreg(MVT::i8, ResultReg, /*Kill=*/true, in X86SelectCmp()
1208 if (!ResultReg) in X86SelectCmp()
1213 ResultReg = createResultReg(&X86::GR8RegClass); in X86SelectCmp()
1215 ResultReg).addImm(1); in X86SelectCmp()
1220 if (ResultReg) { in X86SelectCmp()
1221 updateValueMap(I, ResultReg); in X86SelectCmp()
1249 ResultReg = createResultReg(&X86::GR8RegClass); in X86SelectCmp()
1261 ResultReg).addReg(FlagReg1).addReg(FlagReg2); in X86SelectCmp()
1262 updateValueMap(I, ResultReg); in X86SelectCmp()
1279 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg); in X86SelectCmp()
1280 updateValueMap(I, ResultReg); in X86SelectCmp()
1289 unsigned ResultReg = getRegForValue(I->getOperand(0)); in X86SelectZExt() local
1290 if (ResultReg == 0) in X86SelectZExt()
1297 ResultReg = fastEmitZExtFromI1(MVT::i8, ResultReg, /*TODO: Kill=*/false); in X86SelectZExt()
1300 if (ResultReg == 0) in X86SelectZExt()
1317 .addReg(ResultReg); in X86SelectZExt()
1319 ResultReg = createResultReg(&X86::GR64RegClass); in X86SelectZExt()
1321 ResultReg) in X86SelectZExt()
1324 ResultReg = fastEmit_r(MVT::i8, DstVT.getSimpleVT(), ISD::ZERO_EXTEND, in X86SelectZExt()
1325 ResultReg, /*Kill=*/true); in X86SelectZExt()
1326 if (ResultReg == 0) in X86SelectZExt()
1330 updateValueMap(I, ResultReg); in X86SelectZExt()
1566 unsigned ResultReg = createResultReg(RC); in X86SelectShift() local
1567 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(OpReg), ResultReg) in X86SelectShift()
1569 updateValueMap(I, ResultReg); in X86SelectShift()
1709 unsigned ResultReg = 0; in X86SelectDivRem() local
1723 ResultReg = fastEmitInst_extractsubreg(MVT::i8, ResultSuperReg, in X86SelectDivRem()
1727 if (!ResultReg) { in X86SelectDivRem()
1728 ResultReg = createResultReg(TypeEntry.RC); in X86SelectDivRem()
1729 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Copy), ResultReg) in X86SelectDivRem()
1732 updateValueMap(I, ResultReg); in X86SelectDivRem()
1848 unsigned ResultReg = fastEmitInst_rr(Opc, RC, RHSReg, RHSIsKill, in X86FastEmitCMoveSelect() local
1850 updateValueMap(I, ResultReg); in X86FastEmitCMoveSelect()
1926 unsigned ResultReg; in X86FastEmitSSESelect() local
1941 ResultReg = fastEmitInst_rrr(BlendOpcode, RC, RHSReg, RHSIsKill, in X86FastEmitSSESelect()
1950 ResultReg = fastEmitInst_rr(Opc[3], RC, AndNReg, /*IsKill=*/true, in X86FastEmitSSESelect()
1953 updateValueMap(I, ResultReg); in X86FastEmitSSESelect()
2015 unsigned ResultReg = in X86FastEmitPseudoSelect() local
2017 updateValueMap(I, ResultReg); in X86FastEmitPseudoSelect()
2042 unsigned ResultReg = createResultReg(RC); in X86SelectSelect() local
2044 TII.get(TargetOpcode::COPY), ResultReg) in X86SelectSelect()
2046 updateValueMap(I, ResultReg); in X86SelectSelect()
2098 unsigned ResultReg = in X86SelectSIToFP() local
2100 updateValueMap(I, ResultReg); in X86SelectSIToFP()
2116 unsigned ResultReg = createResultReg(RC); in X86SelectFPExtOrFPTrunc() local
2119 ResultReg); in X86SelectFPExtOrFPTrunc()
2123 updateValueMap(I, ResultReg); in X86SelectFPExtOrFPTrunc()
2182 unsigned ResultReg = fastEmitInst_extractsubreg(MVT::i8, in X86SelectTrunc() local
2185 if (!ResultReg) in X86SelectTrunc()
2188 updateValueMap(I, ResultReg); in X86SelectTrunc()
2255 unsigned ResultReg = 0; in fastLowerIntrinsicCall() local
2266 ResultReg = createResultReg(&X86::GR32RegClass); in fastLowerIntrinsicCall()
2268 TII.get(X86::VMOVPDI2DIrr), ResultReg) in fastLowerIntrinsicCall()
2273 ResultReg = fastEmitInst_extractsubreg(MVT::i16, ResultReg, true, RegIdx); in fastLowerIntrinsicCall()
2288 ResultReg = createResultReg(&X86::FR32RegClass); in fastLowerIntrinsicCall()
2290 TII.get(TargetOpcode::COPY), ResultReg) in fastLowerIntrinsicCall()
2294 updateValueMap(II, ResultReg); in fastLowerIntrinsicCall()
2471 unsigned ResultReg = createResultReg(RC); in fastLowerIntrinsicCall() local
2474 ResultReg); in fastLowerIntrinsicCall()
2481 updateValueMap(II, ResultReg); in fastLowerIntrinsicCall()
2542 unsigned ResultReg = 0; in fastLowerIntrinsicCall() local
2551 ResultReg = createResultReg(TLI.getRegClassFor(VT)); in fastLowerIntrinsicCall()
2554 TII.get(Opc[IsDec][VT.SimpleTy-MVT::i8]), ResultReg) in fastLowerIntrinsicCall()
2557 ResultReg = fastEmit_ri(VT, VT, BaseOpc, LHSReg, LHSIsKill, in fastLowerIntrinsicCall()
2563 if (!ResultReg) { in fastLowerIntrinsicCall()
2568 ResultReg = fastEmit_rr(VT, VT, BaseOpc, LHSReg, LHSIsKill, RHSReg, in fastLowerIntrinsicCall()
2574 if (BaseOpc == X86ISD::UMUL && !ResultReg) { in fastLowerIntrinsicCall()
2583 ResultReg = fastEmitInst_r(MULOpc[VT.SimpleTy-MVT::i8], in fastLowerIntrinsicCall()
2585 } else if (BaseOpc == X86ISD::SMUL && !ResultReg) { in fastLowerIntrinsicCall()
2594 ResultReg = fastEmitInst_r(MULOpc[0], TLI.getRegClassFor(VT), RHSReg, in fastLowerIntrinsicCall()
2597 ResultReg = fastEmitInst_rr(MULOpc[VT.SimpleTy-MVT::i8], in fastLowerIntrinsicCall()
2602 if (!ResultReg) in fastLowerIntrinsicCall()
2606 assert((ResultReg+1) == ResultReg2 && "Nonconsecutive result registers."); in fastLowerIntrinsicCall()
2610 updateValueMap(II, ResultReg, 2); in fastLowerIntrinsicCall()
2672 unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT)); in fastLowerIntrinsicCall() local
2673 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg) in fastLowerIntrinsicCall()
2676 updateValueMap(II, ResultReg); in fastLowerIntrinsicCall()
2768 unsigned ResultReg = createResultReg(RC); in fastLowerArguments() local
2770 TII.get(TargetOpcode::COPY), ResultReg) in fastLowerArguments()
2772 updateValueMap(&Arg, ResultReg); in fastLowerArguments()
2866 unsigned ResultReg; in fastLowerCall() local
2871 ResultReg = getRegForValue(PrevVal); in fastLowerCall()
2873 if (!ResultReg) in fastLowerCall()
2879 ResultReg = in fastLowerCall()
2880 fastEmit_ri(VT, VT, ISD::AND, ResultReg, hasTrivialKill(PrevVal), 1); in fastLowerCall()
2884 ResultReg = getRegForValue(Val); in fastLowerCall()
2887 if (!ResultReg) in fastLowerCall()
2890 ArgRegs.push_back(ResultReg); in fastLowerCall()
3135 unsigned ResultReg = FuncInfo.CreateRegs(CLI.RetTy); in fastLowerCall() local
3139 unsigned CopyReg = ResultReg + i; in fastLowerCall()
3173 TII.get(Opc), ResultReg + i), FI); in fastLowerCall()
3177 CLI.ResultReg = ResultReg; in fastLowerCall()
3257 unsigned ResultReg = createResultReg(&X86::GR64RegClass); in X86MaterializeInt() local
3259 TII.get(TargetOpcode::SUBREG_TO_REG), ResultReg) in X86MaterializeInt()
3261 return ResultReg; in X86MaterializeInt()
3285 unsigned ResultReg = createResultReg(&X86::GR64RegClass); in X86MaterializeInt() local
3287 TII.get(TargetOpcode::SUBREG_TO_REG), ResultReg) in X86MaterializeInt()
3289 return ResultReg; in X86MaterializeInt()
3354 unsigned ResultReg = createResultReg(RC); in X86MaterializeFP() local
3362 TII.get(Opc), ResultReg); in X86MaterializeFP()
3368 return ResultReg; in X86MaterializeFP()
3372 TII.get(Opc), ResultReg), in X86MaterializeFP()
3374 return ResultReg; in X86MaterializeFP()
3391 unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT)); in X86MaterializeGV() local
3397 ResultReg) in X86MaterializeGV()
3405 TII.get(Opc), ResultReg), AM); in X86MaterializeGV()
3407 return ResultReg; in X86MaterializeGV()
3450 unsigned ResultReg = createResultReg(RC); in fastMaterializeAlloca() local
3452 TII.get(Opc), ResultReg), AM); in fastMaterializeAlloca()
3453 return ResultReg; in fastMaterializeAlloca()
3489 unsigned ResultReg = createResultReg(RC); in fastMaterializeFloatZero() local
3490 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg); in fastMaterializeFloatZero()
3491 return ResultReg; in fastMaterializeFloatZero()