335   switch (VT.getSimpleVT().SimpleTy) {  in X86FastEmitLoad()
420   switch (VT.getSimpleVT().SimpleTy) {  in X86FastEmitStore()
487     switch (VT.getSimpleVT().SimpleTy) {  in X86FastEmitStore()
1115   switch (VT.getSimpleVT().SimpleTy) {  in X86ChooseCmpOpcode()
1132   switch (VT.getSimpleVT().SimpleTy) {  in X86ChooseCmpImmediateOpcode()
1295   if (SrcVT.SimpleTy == MVT::i1) {  in X86SelectZExt()
1308     switch (SrcVT.SimpleTy) {  in X86SelectZExt()
1435       switch (SourceVT.SimpleTy) {  in X86SelectBranch()
1639   switch (VT.SimpleTy) {  in X86SelectDivRem()
1683       if (VT.SimpleTy == MVT::i16) {  in X86SelectDivRem()
1687       } else if (VT.SimpleTy == MVT::i32) {  in X86SelectDivRem()
1691       } else if (VT.SimpleTy == MVT::i64) {  in X86SelectDivRem()
1901   switch (RetVT.SimpleTy) {  in X86FastEmitSSESelect()
1935       (RetVT.SimpleTy == MVT::f32) ? X86::VCMPSSrr : X86::VCMPSDrr;  in X86FastEmitSSESelect()
1937       (RetVT.SimpleTy == MVT::f32) ? X86::VBLENDVPSrr : X86::VBLENDVPDrr;  in X86FastEmitSSESelect()
1961   switch (RetVT.SimpleTy) {  in X86FastEmitPseudoSelect()
2311     switch (VT.SimpleTy) {  in fastLowerIntrinsicCall()
2452     switch (VT.SimpleTy) {  in fastLowerIntrinsicCall()
2554                 TII.get(Opc[IsDec][VT.SimpleTy-MVT::i8]), ResultReg)  in fastLowerIntrinsicCall()
2581               TII.get(TargetOpcode::COPY), Reg[VT.SimpleTy-MVT::i8])  in fastLowerIntrinsicCall()
2583       ResultReg = fastEmitInst_r(MULOpc[VT.SimpleTy-MVT::i8],  in fastLowerIntrinsicCall()
2597         ResultReg = fastEmitInst_rr(MULOpc[VT.SimpleTy-MVT::i8],  in fastLowerIntrinsicCall()
2647     switch (VT.SimpleTy) {  in fastLowerIntrinsicCall()
2719     switch (ArgVT.getSimpleVT().SimpleTy) {  in fastLowerArguments()
2757     switch (VT.SimpleTy) {  in fastLowerArguments()
3245     switch (VT.SimpleTy) {  in X86MaterializeInt()
3267   switch (VT.SimpleTy) {  in X86MaterializeInt()
3306   switch (VT.SimpleTy) {  in X86MaterializeFP()
3464   switch (VT.SimpleTy) {  in fastMaterializeFloatZero()