126         if (Reg < X86::FP0 || Reg > X86::FP6)  in calcLiveInMask()
128         Mask |= 1 << (Reg - X86::FP0);  in calcLiveInMask()
194       return StackTop - 1 - getSlot(RegNo) + X86::ST0;  in getSTReg()
223       BuildMI(*MBB, I, dl, TII->get(X86::XCH_F)).addReg(STReg);  in moveToTop()
232       BuildMI(*MBB, I, dl, TII->get(X86::LD_Frr)).addReg(STReg);  in duplicateToTop()
275       return X86::RFP80RegClass.contains(DstReg) ||  in isFPCopy()
276         X86::RFP80RegClass.contains(SrcReg);  in isFPCopy()
291   assert(Reg >= X86::FP0 && Reg <= X86::FP6 && "Expected FP register!");  in getFPReg()
292   return Reg - X86::FP0;  in getFPReg()
303   static_assert(X86::FP6 == X86::FP0+6, "Register enums aren't sorted right!");  in runOnMachineFunction()
305     if (MF.getRegInfo().isPhysRegUsed(X86::FP0+i)) {  in runOnMachineFunction()
383         X86::RFP80RegClass.contains(MI->getOperand(0).getReg()))  in processBasicBlock()
425       if (Reg >= X86::FP0 && Reg <= X86::FP6 && isLive(Reg-X86::FP0)) {  in processBasicBlock()
426         DEBUG(dbgs() << "Register FP#" << Reg-X86::FP0 << " is dead!\n");  in processBasicBlock()
427         freeStackSlotAfter(I, Reg-X86::FP0);  in processBasicBlock()
476     MBB->addLiveIn(X86::ST0+i-1);  in setupBlockStack()
586   { X86::ABS_Fp32     , X86::ABS_F     },
587   { X86::ABS_Fp64     , X86::ABS_F     },
588   { X86::ABS_Fp80     , X86::ABS_F     },
589   { X86::ADD_Fp32m    , X86::ADD_F32m  },
590   { X86::ADD_Fp64m    , X86::ADD_F64m  },
591   { X86::ADD_Fp64m32  , X86::ADD_F32m  },
592   { X86::ADD_Fp80m32  , X86::ADD_F32m  },
593   { X86::ADD_Fp80m64  , X86::ADD_F64m  },
594   { X86::ADD_FpI16m32 , X86::ADD_FI16m },
595   { X86::ADD_FpI16m64 , X86::ADD_FI16m },
596   { X86::ADD_FpI16m80 , X86::ADD_FI16m },
597   { X86::ADD_FpI32m32 , X86::ADD_FI32m },
598   { X86::ADD_FpI32m64 , X86::ADD_FI32m },
599   { X86::ADD_FpI32m80 , X86::ADD_FI32m },
600   { X86::CHS_Fp32     , X86::CHS_F     },
601   { X86::CHS_Fp64     , X86::CHS_F     },
602   { X86::CHS_Fp80     , X86::CHS_F     },
603   { X86::CMOVBE_Fp32  , X86::CMOVBE_F  },
604   { X86::CMOVBE_Fp64  , X86::CMOVBE_F  },
605   { X86::CMOVBE_Fp80  , X86::CMOVBE_F  },
606   { X86::CMOVB_Fp32   , X86::CMOVB_F   },
607   { X86::CMOVB_Fp64   , X86::CMOVB_F  },
608   { X86::CMOVB_Fp80   , X86::CMOVB_F  },
609   { X86::CMOVE_Fp32   , X86::CMOVE_F  },
610   { X86::CMOVE_Fp64   , X86::CMOVE_F   },
611   { X86::CMOVE_Fp80   , X86::CMOVE_F   },
612   { X86::CMOVNBE_Fp32 , X86::CMOVNBE_F },
613   { X86::CMOVNBE_Fp64 , X86::CMOVNBE_F },
614   { X86::CMOVNBE_Fp80 , X86::CMOVNBE_F },
615   { X86::CMOVNB_Fp32  , X86::CMOVNB_F  },
616   { X86::CMOVNB_Fp64  , X86::CMOVNB_F  },
617   { X86::CMOVNB_Fp80  , X86::CMOVNB_F  },
618   { X86::CMOVNE_Fp32  , X86::CMOVNE_F  },
619   { X86::CMOVNE_Fp64  , X86::CMOVNE_F  },
620   { X86::CMOVNE_Fp80  , X86::CMOVNE_F  },
621   { X86::CMOVNP_Fp32  , X86::CMOVNP_F  },
622   { X86::CMOVNP_Fp64  , X86::CMOVNP_F  },
623   { X86::CMOVNP_Fp80  , X86::CMOVNP_F  },
624   { X86::CMOVP_Fp32   , X86::CMOVP_F   },
625   { X86::CMOVP_Fp64   , X86::CMOVP_F   },
626   { X86::CMOVP_Fp80   , X86::CMOVP_F   },
627   { X86::COS_Fp32     , X86::COS_F     },
628   { X86::COS_Fp64     , X86::COS_F     },
629   { X86::COS_Fp80     , X86::COS_F     },
630   { X86::DIVR_Fp32m   , X86::DIVR_F32m },
631   { X86::DIVR_Fp64m   , X86::DIVR_F64m },
632   { X86::DIVR_Fp64m32 , X86::DIVR_F32m },
633   { X86::DIVR_Fp80m32 , X86::DIVR_F32m },
634   { X86::DIVR_Fp80m64 , X86::DIVR_F64m },
635   { X86::DIVR_FpI16m32, X86::DIVR_FI16m},
636   { X86::DIVR_FpI16m64, X86::DIVR_FI16m},
637   { X86::DIVR_FpI16m80, X86::DIVR_FI16m},
638   { X86::DIVR_FpI32m32, X86::DIVR_FI32m},
639   { X86::DIVR_FpI32m64, X86::DIVR_FI32m},
640   { X86::DIVR_FpI32m80, X86::DIVR_FI32m},
641   { X86::DIV_Fp32m    , X86::DIV_F32m  },
642   { X86::DIV_Fp64m    , X86::DIV_F64m  },
643   { X86::DIV_Fp64m32  , X86::DIV_F32m  },
644   { X86::DIV_Fp80m32  , X86::DIV_F32m  },
645   { X86::DIV_Fp80m64  , X86::DIV_F64m  },
646   { X86::DIV_FpI16m32 , X86::DIV_FI16m },
647   { X86::DIV_FpI16m64 , X86::DIV_FI16m },
648   { X86::DIV_FpI16m80 , X86::DIV_FI16m },
649   { X86::DIV_FpI32m32 , X86::DIV_FI32m },
650   { X86::DIV_FpI32m64 , X86::DIV_FI32m },
651   { X86::DIV_FpI32m80 , X86::DIV_FI32m },
652   { X86::ILD_Fp16m32  , X86::ILD_F16m  },
653   { X86::ILD_Fp16m64  , X86::ILD_F16m  },
654   { X86::ILD_Fp16m80  , X86::ILD_F16m  },
655   { X86::ILD_Fp32m32  , X86::ILD_F32m  },
656   { X86::ILD_Fp32m64  , X86::ILD_F32m  },
657   { X86::ILD_Fp32m80  , X86::ILD_F32m  },
658   { X86::ILD_Fp64m32  , X86::ILD_F64m  },
659   { X86::ILD_Fp64m64  , X86::ILD_F64m  },
660   { X86::ILD_Fp64m80  , X86::ILD_F64m  },
661   { X86::ISTT_Fp16m32 , X86::ISTT_FP16m},
662   { X86::ISTT_Fp16m64 , X86::ISTT_FP16m},
663   { X86::ISTT_Fp16m80 , X86::ISTT_FP16m},
664   { X86::ISTT_Fp32m32 , X86::ISTT_FP32m},
665   { X86::ISTT_Fp32m64 , X86::ISTT_FP32m},
666   { X86::ISTT_Fp32m80 , X86::ISTT_FP32m},
667   { X86::ISTT_Fp64m32 , X86::ISTT_FP64m},
668   { X86::ISTT_Fp64m64 , X86::ISTT_FP64m},
669   { X86::ISTT_Fp64m80 , X86::ISTT_FP64m},
670   { X86::IST_Fp16m32  , X86::IST_F16m  },
671   { X86::IST_Fp16m64  , X86::IST_F16m  },
672   { X86::IST_Fp16m80  , X86::IST_F16m  },
673   { X86::IST_Fp32m32  , X86::IST_F32m  },
674   { X86::IST_Fp32m64  , X86::IST_F32m  },
675   { X86::IST_Fp32m80  , X86::IST_F32m  },
676   { X86::IST_Fp64m32  , X86::IST_FP64m },
677   { X86::IST_Fp64m64  , X86::IST_FP64m },
678   { X86::IST_Fp64m80  , X86::IST_FP64m },
679   { X86::LD_Fp032     , X86::LD_F0     },
680   { X86::LD_Fp064     , X86::LD_F0     },
681   { X86::LD_Fp080     , X86::LD_F0     },
682   { X86::LD_Fp132     , X86::LD_F1     },
683   { X86::LD_Fp164     , X86::LD_F1     },
684   { X86::LD_Fp180     , X86::LD_F1     },
685   { X86::LD_Fp32m     , X86::LD_F32m   },
686   { X86::LD_Fp32m64   , X86::LD_F32m   },
687   { X86::LD_Fp32m80   , X86::LD_F32m   },
688   { X86::LD_Fp64m     , X86::LD_F64m   },
689   { X86::LD_Fp64m80   , X86::LD_F64m   },
690   { X86::LD_Fp80m     , X86::LD_F80m   },
691   { X86::MUL_Fp32m    , X86::MUL_F32m  },
692   { X86::MUL_Fp64m    , X86::MUL_F64m  },
693   { X86::MUL_Fp64m32  , X86::MUL_F32m  },
694   { X86::MUL_Fp80m32  , X86::MUL_F32m  },
695   { X86::MUL_Fp80m64  , X86::MUL_F64m  },
696   { X86::MUL_FpI16m32 , X86::MUL_FI16m },
697   { X86::MUL_FpI16m64 , X86::MUL_FI16m },
698   { X86::MUL_FpI16m80 , X86::MUL_FI16m },
699   { X86::MUL_FpI32m32 , X86::MUL_FI32m },
700   { X86::MUL_FpI32m64 , X86::MUL_FI32m },
701   { X86::MUL_FpI32m80 , X86::MUL_FI32m },
702   { X86::SIN_Fp32     , X86::SIN_F     },
703   { X86::SIN_Fp64     , X86::SIN_F     },
704   { X86::SIN_Fp80     , X86::SIN_F     },
705   { X86::SQRT_Fp32    , X86::SQRT_F    },
706   { X86::SQRT_Fp64    , X86::SQRT_F    },
707   { X86::SQRT_Fp80    , X86::SQRT_F    },
708   { X86::ST_Fp32m     , X86::ST_F32m   },
709   { X86::ST_Fp64m     , X86::ST_F64m   },
710   { X86::ST_Fp64m32   , X86::ST_F32m   },
711   { X86::ST_Fp80m32   , X86::ST_F32m   },
712   { X86::ST_Fp80m64   , X86::ST_F64m   },
713   { X86::ST_FpP80m    , X86::ST_FP80m  },
714   { X86::SUBR_Fp32m   , X86::SUBR_F32m },
715   { X86::SUBR_Fp64m   , X86::SUBR_F64m },
716   { X86::SUBR_Fp64m32 , X86::SUBR_F32m },
717   { X86::SUBR_Fp80m32 , X86::SUBR_F32m },
718   { X86::SUBR_Fp80m64 , X86::SUBR_F64m },
719   { X86::SUBR_FpI16m32, X86::SUBR_FI16m},
720   { X86::SUBR_FpI16m64, X86::SUBR_FI16m},
721   { X86::SUBR_FpI16m80, X86::SUBR_FI16m},
722   { X86::SUBR_FpI32m32, X86::SUBR_FI32m},
723   { X86::SUBR_FpI32m64, X86::SUBR_FI32m},
724   { X86::SUBR_FpI32m80, X86::SUBR_FI32m},
725   { X86::SUB_Fp32m    , X86::SUB_F32m  },
726   { X86::SUB_Fp64m    , X86::SUB_F64m  },
727   { X86::SUB_Fp64m32  , X86::SUB_F32m  },
728   { X86::SUB_Fp80m32  , X86::SUB_F32m  },
729   { X86::SUB_Fp80m64  , X86::SUB_F64m  },
730   { X86::SUB_FpI16m32 , X86::SUB_FI16m },
731   { X86::SUB_FpI16m64 , X86::SUB_FI16m },
732   { X86::SUB_FpI16m80 , X86::SUB_FI16m },
733   { X86::SUB_FpI32m32 , X86::SUB_FI32m },
734   { X86::SUB_FpI32m64 , X86::SUB_FI32m },
735   { X86::SUB_FpI32m80 , X86::SUB_FI32m },
736   { X86::TST_Fp32     , X86::TST_F     },
737   { X86::TST_Fp64     , X86::TST_F     },
738   { X86::TST_Fp80     , X86::TST_F     },
739   { X86::UCOM_FpIr32  , X86::UCOM_FIr  },
740   { X86::UCOM_FpIr64  , X86::UCOM_FIr  },
741   { X86::UCOM_FpIr80  , X86::UCOM_FIr  },
742   { X86::UCOM_Fpr32   , X86::UCOM_Fr   },
743   { X86::UCOM_Fpr64   , X86::UCOM_Fr   },
744   { X86::UCOM_Fpr80   , X86::UCOM_Fr   },
762   { X86::ADD_FrST0 , X86::ADD_FPrST0  },
764   { X86::DIVR_FrST0, X86::DIVR_FPrST0 },
765   { X86::DIV_FrST0 , X86::DIV_FPrST0  },
767   { X86::IST_F16m  , X86::IST_FP16m   },
768   { X86::IST_F32m  , X86::IST_FP32m   },
770   { X86::MUL_FrST0 , X86::MUL_FPrST0  },
772   { X86::ST_F32m   , X86::ST_FP32m    },
773   { X86::ST_F64m   , X86::ST_FP64m    },
774   { X86::ST_Frr    , X86::ST_FPrr     },
776   { X86::SUBR_FrST0, X86::SUBR_FPrST0 },
777   { X86::SUB_FrST0 , X86::SUB_FPrST0  },
779   { X86::UCOM_FIr  , X86::UCOM_FIPr   },
781   { X86::UCOM_FPr  , X86::UCOM_FPPr   },
782   { X86::UCOM_Fr   , X86::UCOM_FPr    },
803     if (Opcode == X86::UCOM_FPPr)  in popStackAfter()
806     I = BuildMI(*MBB, ++I, dl, TII->get(X86::ST_FPrr)).addReg(X86::ST0);  in popStackAfter()
837   return BuildMI(*MBB, I, DebugLoc(), TII->get(X86::ST_FPrr))  in freeStackSlotBefore()
894     BuildMI(*MBB, I, DebugLoc(), TII->get(X86::LD_F0));  in adjustLiveRegs()
938     unsigned R = MO.getReg() - X86::FP0;  in handleCall()
975   assert((NumOps == X86::AddrNumOperands + 1 || NumOps == 1) &&  in handleOneArgFP()
980   bool KillsSrc = MI->killsRegister(X86::FP0+Reg);  in handleOneArgFP()
989       (MI->getOpcode() == X86::IST_Fp64m32 ||  in handleOneArgFP()
990        MI->getOpcode() == X86::ISTT_Fp16m32 ||  in handleOneArgFP()
991        MI->getOpcode() == X86::ISTT_Fp32m32 ||  in handleOneArgFP()
992        MI->getOpcode() == X86::ISTT_Fp64m32 ||  in handleOneArgFP()
993        MI->getOpcode() == X86::IST_Fp64m64 ||  in handleOneArgFP()
994        MI->getOpcode() == X86::ISTT_Fp16m64 ||  in handleOneArgFP()
995        MI->getOpcode() == X86::ISTT_Fp32m64 ||  in handleOneArgFP()
996        MI->getOpcode() == X86::ISTT_Fp64m64 ||  in handleOneArgFP()
997        MI->getOpcode() == X86::IST_Fp64m80 ||  in handleOneArgFP()
998        MI->getOpcode() == X86::ISTT_Fp16m80 ||  in handleOneArgFP()
999        MI->getOpcode() == X86::ISTT_Fp32m80 ||  in handleOneArgFP()
1000        MI->getOpcode() == X86::ISTT_Fp64m80 ||  in handleOneArgFP()
1001        MI->getOpcode() == X86::ST_FpP80m)) {  in handleOneArgFP()
1011   if (MI->getOpcode() == X86::IST_FP64m ||  in handleOneArgFP()
1012       MI->getOpcode() == X86::ISTT_FP16m ||  in handleOneArgFP()
1013       MI->getOpcode() == X86::ISTT_FP32m ||  in handleOneArgFP()
1014       MI->getOpcode() == X86::ISTT_FP64m ||  in handleOneArgFP()
1015       MI->getOpcode() == X86::ST_FP80m) {  in handleOneArgFP()
1042   bool KillsSrc = MI->killsRegister(X86::FP0+Reg);  in handleOneArgFPRW()
1071   { X86::ADD_Fp32  , X86::ADD_FST0r },
1072   { X86::ADD_Fp64  , X86::ADD_FST0r },
1073   { X86::ADD_Fp80  , X86::ADD_FST0r },
1074   { X86::DIV_Fp32  , X86::DIV_FST0r },
1075   { X86::DIV_Fp64  , X86::DIV_FST0r },
1076   { X86::DIV_Fp80  , X86::DIV_FST0r },
1077   { X86::MUL_Fp32  , X86::MUL_FST0r },
1078   { X86::MUL_Fp64  , X86::MUL_FST0r },
1079   { X86::MUL_Fp80  , X86::MUL_FST0r },
1080   { X86::SUB_Fp32  , X86::SUB_FST0r },
1081   { X86::SUB_Fp64  , X86::SUB_FST0r },
1082   { X86::SUB_Fp80  , X86::SUB_FST0r },
1087   { X86::ADD_Fp32  , X86::ADD_FST0r  },   // commutative
1088   { X86::ADD_Fp64  , X86::ADD_FST0r  },   // commutative
1089   { X86::ADD_Fp80  , X86::ADD_FST0r  },   // commutative
1090   { X86::DIV_Fp32  , X86::DIVR_FST0r },
1091   { X86::DIV_Fp64  , X86::DIVR_FST0r },
1092   { X86::DIV_Fp80  , X86::DIVR_FST0r },
1093   { X86::MUL_Fp32  , X86::MUL_FST0r  },   // commutative
1094   { X86::MUL_Fp64  , X86::MUL_FST0r  },   // commutative
1095   { X86::MUL_Fp80  , X86::MUL_FST0r  },   // commutative
1096   { X86::SUB_Fp32  , X86::SUBR_FST0r },
1097   { X86::SUB_Fp64  , X86::SUBR_FST0r },
1098   { X86::SUB_Fp80  , X86::SUBR_FST0r },
1103   { X86::ADD_Fp32  , X86::ADD_FrST0  },   // commutative
1104   { X86::ADD_Fp64  , X86::ADD_FrST0  },   // commutative
1105   { X86::ADD_Fp80  , X86::ADD_FrST0  },   // commutative
1106   { X86::DIV_Fp32  , X86::DIVR_FrST0 },
1107   { X86::DIV_Fp64  , X86::DIVR_FrST0 },
1108   { X86::DIV_Fp80  , X86::DIVR_FrST0 },
1109   { X86::MUL_Fp32  , X86::MUL_FrST0  },   // commutative
1110   { X86::MUL_Fp64  , X86::MUL_FrST0  },   // commutative
1111   { X86::MUL_Fp80  , X86::MUL_FrST0  },   // commutative
1112   { X86::SUB_Fp32  , X86::SUBR_FrST0 },
1113   { X86::SUB_Fp64  , X86::SUBR_FrST0 },
1114   { X86::SUB_Fp80  , X86::SUBR_FrST0 },
1119   { X86::ADD_Fp32  , X86::ADD_FrST0 },
1120   { X86::ADD_Fp64  , X86::ADD_FrST0 },
1121   { X86::ADD_Fp80  , X86::ADD_FrST0 },
1122   { X86::DIV_Fp32  , X86::DIV_FrST0 },
1123   { X86::DIV_Fp64  , X86::DIV_FrST0 },
1124   { X86::DIV_Fp80  , X86::DIV_FrST0 },
1125   { X86::MUL_Fp32  , X86::MUL_FrST0 },
1126   { X86::MUL_Fp64  , X86::MUL_FrST0 },
1127   { X86::MUL_Fp80  , X86::MUL_FrST0 },
1128   { X86::SUB_Fp32  , X86::SUB_FrST0 },
1129   { X86::SUB_Fp64  , X86::SUB_FrST0 },
1130   { X86::SUB_Fp80  , X86::SUB_FrST0 },
1152   bool KillsOp0 = MI->killsRegister(X86::FP0+Op0);  in handleTwoArgFP()
1153   bool KillsOp1 = MI->killsRegister(X86::FP0+Op1);  in handleTwoArgFP()
1250   bool KillsOp0 = MI->killsRegister(X86::FP0+Op0);  in handleCompareFP()
1251   bool KillsOp1 = MI->killsRegister(X86::FP0+Op1);  in handleCompareFP()
1276   bool KillsOp1 = MI->killsRegister(X86::FP0+Op1);  in handleCondMovFP()
1336     unsigned Reg = MI->getOperand(0).getReg() - X86::FP0;  in handleSpecialFP()
1338     BuildMI(*MBB, Inst, MI->getDebugLoc(), TII->get(X86::LD_F0));  in handleSpecialFP()
1392       unsigned STReg = MO.getReg() - X86::FP0;  in handleSpecialFP()
1460       if (!Op.isReg() || Op.getReg() < X86::FP0 || Op.getReg() > X86::FP6)  in handleSpecialFP()
1486       if (!Op.isReg() || Op.getReg() < X86::FP0 || Op.getReg() > X86::FP6)  in handleSpecialFP()
1496         Op.setReg(X86::ST0 + FPReg);  in handleSpecialFP()
1523   case X86::WIN_FTOL_32:  in handleSpecialFP()
1524   case X86::WIN_FTOL_64: {  in handleSpecialFP()
1528       Op.getReg() >= X86::FP0 && Op.getReg() <= X86::FP6);  in handleSpecialFP()
1536     BuildMI(*MBB, Inst, MI->getDebugLoc(), TII->get(X86::CALLpcrel32))  in handleSpecialFP()
1538       .addReg(X86::ST0, RegState::ImplicitKill)  in handleSpecialFP()
1539       .addReg(X86::ECX, RegState::ImplicitDefine)  in handleSpecialFP()
1540       .addReg(X86::EAX, RegState::Define | RegState::Implicit)  in handleSpecialFP()
1541       .addReg(X86::EDX, RegState::Define | RegState::Implicit)  in handleSpecialFP()
1542       .addReg(X86::EFLAGS, RegState::Define | RegState::Implicit);  in handleSpecialFP()
1548   case X86::RETQ:  in handleSpecialFP()
1549   case X86::RETL:  in handleSpecialFP()
1550   case X86::RETIL:  in handleSpecialFP()
1551   case X86::RETIQ:  in handleSpecialFP()
1561       if (!Op.isReg() || Op.getReg() < X86::FP0 || Op.getReg() > X86::FP6)  in handleSpecialFP()
1668       unsigned Reg = MO.getReg() - X86::FP0;  in setKillFlags()