Lines Matching refs:addReg
245 .addReg(StackPtr) in emitSPUpdate()
246 .addReg(Reg); in emitSPUpdate()
264 .addReg(Reg, getDefRegState(!isSub) | getUndefRegState(isSub)); in emitSPUpdate()
279 .addReg(StackPtr) in emitSPUpdate()
432 CI = BuildMI(MBB, MBBI, DL, TII.get(CallOp)).addReg(X86::R11); in emitStackProbeCall()
439 CI.addReg(AX, RegState::Implicit) in emitStackProbeCall()
440 .addReg(SP, RegState::Implicit) in emitStackProbeCall()
441 .addReg(AX, RegState::Define | RegState::Implicit) in emitStackProbeCall()
442 .addReg(SP, RegState::Define | RegState::Implicit) in emitStackProbeCall()
443 .addReg(X86::EFLAGS, RegState::Define | RegState::Implicit); in emitStackProbeCall()
450 .addReg(X86::RSP) in emitStackProbeCall()
451 .addReg(X86::RAX); in emitStackProbeCall()
646 .addReg(StackPtr) in emitPrologue()
689 .addReg(MachineFramePtr, RegState::Kill) in emitPrologue()
721 .addReg(StackPtr) in emitPrologue()
779 .addReg(StackPtr) in emitPrologue()
816 .addReg(X86::EAX, RegState::Kill) in emitPrologue()
880 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rr), FramePtr).addReg(StackPtr); in emitPrologue()
922 .addReg(StackPtr) in emitPrologue()
938 .addReg(StackPtr) in emitPrologue()
945 .addReg(StackPtr) in emitPrologue()
1095 .addReg(FramePtr); in emitEpilogue()
1121 StackPtr).addReg(DestAddr.getReg()); in emitEpilogue()
1175 .addReg(JumpTarget.getReg(), RegState::Kill); in emitEpilogue()
1178 addReg(JumpTarget.getReg(), RegState::Kill); in emitEpilogue()
1450 BuildMI(MBB, MI, DL, TII.get(Opc)).addReg(Reg, RegState::Kill) in spillCalleeSavedRegisters()
1677 … BuildMI(checkMBB, DL, TII.get(IsLP64 ? X86::LEA64r : X86::LEA64_32r), ScratchReg).addReg(X86::RSP) in adjustForSegmentedStacks()
1678 .addImm(1).addReg(0).addImm(-StackSize).addReg(0); in adjustForSegmentedStacks()
1680 BuildMI(checkMBB, DL, TII.get(IsLP64 ? X86::CMP64rm : X86::CMP32rm)).addReg(ScratchReg) in adjustForSegmentedStacks()
1681 .addReg(0).addImm(1).addReg(0).addImm(TlsOffset).addReg(TlsReg); in adjustForSegmentedStacks()
1704 BuildMI(checkMBB, DL, TII.get(X86::LEA32r), ScratchReg).addReg(X86::ESP) in adjustForSegmentedStacks()
1705 .addImm(1).addReg(0).addImm(-StackSize).addReg(0); in adjustForSegmentedStacks()
1709 BuildMI(checkMBB, DL, TII.get(X86::CMP32rm)).addReg(ScratchReg) in adjustForSegmentedStacks()
1710 .addReg(0).addImm(0).addReg(0).addImm(TlsOffset).addReg(TlsReg); in adjustForSegmentedStacks()
1735 .addReg(ScratchReg2, RegState::Kill); in adjustForSegmentedStacks()
1740 .addReg(ScratchReg) in adjustForSegmentedStacks()
1741 .addReg(ScratchReg2).addImm(1).addReg(0) in adjustForSegmentedStacks()
1743 .addReg(TlsReg); in adjustForSegmentedStacks()
1767 BuildMI(allocMBB, DL, TII.get(MOVrr), RegAX).addReg(Reg10); in adjustForSegmentedStacks()
1799 .addReg(X86::RIP) in adjustForSegmentedStacks()
1801 .addReg(0) in adjustForSegmentedStacks()
1803 .addReg(0); in adjustForSegmentedStacks()
1953 .addReg(ScratchReg), PReg, false, SPLimitOffset); in adjustForHiPEPrologue()
1962 .addReg(ScratchReg), PReg, false, SPLimitOffset); in adjustForHiPEPrologue()
2013 .addReg(StackPtr).addImm(Amount); in eliminateCallFramePseudoInstr()
2019 .addReg(StackPtr).addImm(Amount); in eliminateCallFramePseudoInstr()
2040 .addReg(StackPtr).addImm(InternalAmt); in eliminateCallFramePseudoInstr()