157     setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote);  in X86TargetLowering()
740       setLoadExtAction(ISD::SEXTLOAD, InnerVT, VT, Expand);  in X86TargetLowering()
868       setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v4i8, Custom);  in X86TargetLowering()
869       setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v4i16, Custom);  in X86TargetLowering()
870       setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v8i8, Custom);  in X86TargetLowering()
959       setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i8, Custom);  in X86TargetLowering()
960       setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i16, Custom);  in X86TargetLowering()
961       setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i32, Custom);  in X86TargetLowering()
965     setLoadExtAction(ISD::SEXTLOAD, MVT::v8i16, MVT::v8i8,  Legal);  in X86TargetLowering()
966     setLoadExtAction(ISD::SEXTLOAD, MVT::v4i32, MVT::v4i8,  Legal);  in X86TargetLowering()
967     setLoadExtAction(ISD::SEXTLOAD, MVT::v2i64, MVT::v2i8,  Legal);  in X86TargetLowering()
968     setLoadExtAction(ISD::SEXTLOAD, MVT::v4i32, MVT::v4i16, Legal);  in X86TargetLowering()
969     setLoadExtAction(ISD::SEXTLOAD, MVT::v2i64, MVT::v2i16, Legal);  in X86TargetLowering()
970     setLoadExtAction(ISD::SEXTLOAD, MVT::v2i64, MVT::v2i32, Legal);  in X86TargetLowering()
1152       setLoadExtAction(ISD::SEXTLOAD, MVT::v16i16, MVT::v16i8, Legal);  in X86TargetLowering()
1153       setLoadExtAction(ISD::SEXTLOAD, MVT::v8i32,  MVT::v8i8,  Legal);  in X86TargetLowering()
1154       setLoadExtAction(ISD::SEXTLOAD, MVT::v4i64,  MVT::v4i8,  Legal);  in X86TargetLowering()
1155       setLoadExtAction(ISD::SEXTLOAD, MVT::v8i32,  MVT::v8i16, Legal);  in X86TargetLowering()
1156       setLoadExtAction(ISD::SEXTLOAD, MVT::v4i64,  MVT::v4i16, Legal);  in X86TargetLowering()
1157       setLoadExtAction(ISD::SEXTLOAD, MVT::v4i64,  MVT::v4i32, Legal);  in X86TargetLowering()
13786   assert((Ext == ISD::EXTLOAD || Ext == ISD::SEXTLOAD)  in LowerExtendedLoad()
13795   if (Ext == ISD::SEXTLOAD && RegSz == 256 && !Subtarget->hasInt256()) {  in LowerExtendedLoad()
13860   assert((Ext != ISD::SEXTLOAD || NumLoads == 1) &&  in LowerExtendedLoad()
13864   if (Ext == ISD::SEXTLOAD && RegSz == 256)  in LowerExtendedLoad()
13916   if (Ext == ISD::SEXTLOAD) {  in LowerExtendedLoad()
22570   if (Mld->getExtensionType() != ISD::SEXTLOAD)  in PerformMLOADCombine()