Lines Matching refs:getLocReg
1914 VA.getLocReg() == X86::XMM0 || VA.getLocReg() == X86::XMM1) && in LowerReturn()
1927 if (VA.getLocReg() == X86::FP0 || in LowerReturn()
1928 VA.getLocReg() == X86::FP1) { in LowerReturn()
1942 if (VA.getLocReg() == X86::XMM0 || VA.getLocReg() == X86::XMM1) { in LowerReturn()
1954 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), ValToCopy, Flag); in LowerReturn()
1956 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
2076 if ((VA.getLocReg() == X86::FP0 || VA.getLocReg() == X86::FP1) && in LowerCallResult()
2080 Chain = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), in LowerCallResult()
2355 unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC); in LowerFormalArguments()
2837 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
2842 switch (VA.getLocReg()) { in LowerCall()
3360 if (VA.getLocReg() == X86::FP0 || VA.getLocReg() == X86::FP1) in IsEligibleForTailCallOptimization()
3386 if (RVLocs1[i].getLocReg() != RVLocs2[i].getLocReg()) in IsEligibleForTailCallOptimization()
3452 unsigned Reg = VA.getLocReg(); in IsEligibleForTailCallOptimization()