Lines Matching refs:VEX_LIG
573 VEX_4V, VEX_LIG;
578 VEX, VEX_LIG, Sched<[WriteStore]>;
598 IIC_SSE_MOV_S_RM, d>, VEX, VEX_LIG, Sched<[WriteLoad]>;
1521 XS, VEX, VEX_LIG;
1525 XS, VEX, VEX_W, VEX_LIG;
1529 XD, VEX, VEX_LIG;
1533 XD, VEX, VEX_W, VEX_LIG;
1557 XS, VEX_4V, VEX_LIG;
1559 XS, VEX_4V, VEX_W, VEX_LIG;
1561 XD, VEX_4V, VEX_LIG;
1563 XD, VEX_4V, VEX_W, VEX_LIG;
1675 SSE_CVT_SD2SI>, XD, VEX, VEX_LIG;
1678 SSE_CVT_SD2SI>, XD, VEX, VEX_W, VEX_LIG;
1756 SSE_CVT_SS2SI_32>, XS, VEX, VEX_LIG;
1759 SSE_CVT_SS2SI_64>, XS, VEX, VEX_W, VEX_LIG;
1825 IIC_SSE_CVT_Scalar_RR>, VEX_4V, VEX_LIG,
1832 XD, Requires<[HasAVX, OptForSize]>, VEX_4V, VEX_LIG,
1891 XS, Requires<[HasAVX]>, VEX_4V, VEX_LIG,
1898 XS, VEX_4V, VEX_LIG, Requires<[HasAVX, OptForSize]>,
2364 SSE_ALU_F32S, i8immZExt5>, XS, VEX_4V, VEX_LIG;
2369 XD, VEX_4V, VEX_LIG;
2440 "ucomiss">, PS, VEX, VEX_LIG;
2442 "ucomisd">, PD, VEX, VEX_LIG;
2445 "comiss">, PS, VEX, VEX_LIG;
2447 "comisd">, PD, VEX, VEX_LIG;
3057 OpNode, FR32, f32mem, itins.s, 0>, XS, VEX_4V, VEX_LIG;
3059 OpNode, FR64, f64mem, itins.d, 0>, XD, VEX_4V, VEX_LIG;
3073 itins.s, 0>, XS, VEX_4V, VEX_LIG;
3076 itins.d, 0>, XD, VEX_4V, VEX_LIG;
3564 itins, UseAVX, "SS">, XS, VEX_4V, VEX_LIG;
3576 OpNode, itins, UseAVX, "SD">, XD, VEX_4V, VEX_LIG;
6535 int_x86_sse41_round_sd, 0>, VEX_4V, VEX_LIG;