Lines Matching refs:X86
303 if (Reg != X86::AL && Reg != X86::AX && Reg != X86::EAX && Reg != X86::RAX) in SimplifyShortImmForm()
321 case X86::MOVSX16rr8: // movsbw %al, %ax --> cbtw in SimplifyMOVSX()
322 if (Op0 == X86::AX && Op1 == X86::AL) in SimplifyMOVSX()
323 NewOpcode = X86::CBW; in SimplifyMOVSX()
325 case X86::MOVSX32rr16: // movswl %ax, %eax --> cwtl in SimplifyMOVSX()
326 if (Op0 == X86::EAX && Op1 == X86::AX) in SimplifyMOVSX()
327 NewOpcode = X86::CWDE; in SimplifyMOVSX()
329 case X86::MOVSX64rr32: // movslq %eax, %rax --> cltq in SimplifyMOVSX()
330 if (Op0 == X86::RAX && Op1 == X86::EAX) in SimplifyMOVSX()
331 NewOpcode = X86::CDQE; in SimplifyMOVSX()
354 Inst.getOperand(AddrBase + X86::AddrBaseReg).isReg() && in SimplifyShortMoveForm()
355 Inst.getOperand(AddrBase + X86::AddrScaleAmt).isImm() && in SimplifyShortMoveForm()
356 Inst.getOperand(AddrBase + X86::AddrIndexReg).isReg() && in SimplifyShortMoveForm()
357 Inst.getOperand(AddrBase + X86::AddrSegmentReg).isReg() && in SimplifyShortMoveForm()
364 if (Reg != X86::AL && Reg != X86::AX && Reg != X86::EAX && Reg != X86::RAX) in SimplifyShortMoveForm()
379 (Inst.getOperand(AddrBase + X86::AddrBaseReg).getReg() != 0 || in SimplifyShortMoveForm()
380 Inst.getOperand(AddrBase + X86::AddrScaleAmt).getImm() != 1 || in SimplifyShortMoveForm()
381 Inst.getOperand(AddrBase + X86::AddrIndexReg).getReg() != 0)) in SimplifyShortMoveForm()
386 MCOperand Seg = Inst.getOperand(AddrBase + X86::AddrSegmentReg); in SimplifyShortMoveForm()
394 return Subtarget.is64Bit() ? X86::RETQ : X86::RETL; in getRetOpcode()
442 case X86::LEA64_32r: in Lower()
443 case X86::LEA64r: in Lower()
444 case X86::LEA16r: in Lower()
445 case X86::LEA32r: in Lower()
447 assert(OutMI.getNumOperands() == 1+X86::AddrNumOperands && in Lower()
449 assert(OutMI.getOperand(1+X86::AddrSegmentReg).getReg() == 0 && in Lower()
453 case X86::MOV32ri64: in Lower()
454 OutMI.setOpcode(X86::MOV32ri); in Lower()
459 case X86::VMOVAPDrr: in Lower()
460 case X86::VMOVAPDYrr: in Lower()
461 case X86::VMOVAPSrr: in Lower()
462 case X86::VMOVAPSYrr: in Lower()
463 case X86::VMOVDQArr: in Lower()
464 case X86::VMOVDQAYrr: in Lower()
465 case X86::VMOVDQUrr: in Lower()
466 case X86::VMOVDQUYrr: in Lower()
467 case X86::VMOVUPDrr: in Lower()
468 case X86::VMOVUPDYrr: in Lower()
469 case X86::VMOVUPSrr: in Lower()
470 case X86::VMOVUPSYrr: { in Lower()
476 case X86::VMOVAPDrr: NewOpc = X86::VMOVAPDrr_REV; break; in Lower()
477 case X86::VMOVAPDYrr: NewOpc = X86::VMOVAPDYrr_REV; break; in Lower()
478 case X86::VMOVAPSrr: NewOpc = X86::VMOVAPSrr_REV; break; in Lower()
479 case X86::VMOVAPSYrr: NewOpc = X86::VMOVAPSYrr_REV; break; in Lower()
480 case X86::VMOVDQArr: NewOpc = X86::VMOVDQArr_REV; break; in Lower()
481 case X86::VMOVDQAYrr: NewOpc = X86::VMOVDQAYrr_REV; break; in Lower()
482 case X86::VMOVDQUrr: NewOpc = X86::VMOVDQUrr_REV; break; in Lower()
483 case X86::VMOVDQUYrr: NewOpc = X86::VMOVDQUYrr_REV; break; in Lower()
484 case X86::VMOVUPDrr: NewOpc = X86::VMOVUPDrr_REV; break; in Lower()
485 case X86::VMOVUPDYrr: NewOpc = X86::VMOVUPDYrr_REV; break; in Lower()
486 case X86::VMOVUPSrr: NewOpc = X86::VMOVUPSrr_REV; break; in Lower()
487 case X86::VMOVUPSYrr: NewOpc = X86::VMOVUPSYrr_REV; break; in Lower()
493 case X86::VMOVSDrr: in Lower()
494 case X86::VMOVSSrr: { in Lower()
500 case X86::VMOVSDrr: NewOpc = X86::VMOVSDrr_REV; break; in Lower()
501 case X86::VMOVSSrr: NewOpc = X86::VMOVSSrr_REV; break; in Lower()
511 case X86::TAILJMPr64: in Lower()
512 case X86::TAILJMPr64_REX: in Lower()
513 case X86::CALL64r: in Lower()
514 case X86::CALL64pcrel32: { in Lower()
523 case X86::EH_RETURN: in Lower()
524 case X86::EH_RETURN64: { in Lower()
531 case X86::TAILJMPr: in Lower()
532 case X86::TAILJMPd: in Lower()
533 case X86::TAILJMPd64: { in Lower()
537 case X86::TAILJMPr: Opcode = X86::JMP32r; break; in Lower()
538 case X86::TAILJMPd: in Lower()
539 case X86::TAILJMPd64: Opcode = X86::JMP_1; break; in Lower()
549 case X86::DEC16r: in Lower()
550 case X86::DEC32r: in Lower()
551 case X86::INC16r: in Lower()
552 case X86::INC32r: in Lower()
558 case X86::DEC16r: Opcode = X86::DEC16r_alt; break; in Lower()
559 case X86::DEC32r: Opcode = X86::DEC32r_alt; break; in Lower()
560 case X86::INC16r: Opcode = X86::INC16r_alt; break; in Lower()
561 case X86::INC32r: Opcode = X86::INC32r_alt; break; in Lower()
570 case X86::ADD16rr_DB: OutMI.setOpcode(X86::OR16rr); goto ReSimplify; in Lower()
571 case X86::ADD32rr_DB: OutMI.setOpcode(X86::OR32rr); goto ReSimplify; in Lower()
572 case X86::ADD64rr_DB: OutMI.setOpcode(X86::OR64rr); goto ReSimplify; in Lower()
573 case X86::ADD16ri_DB: OutMI.setOpcode(X86::OR16ri); goto ReSimplify; in Lower()
574 case X86::ADD32ri_DB: OutMI.setOpcode(X86::OR32ri); goto ReSimplify; in Lower()
575 case X86::ADD64ri32_DB: OutMI.setOpcode(X86::OR64ri32); goto ReSimplify; in Lower()
576 case X86::ADD16ri8_DB: OutMI.setOpcode(X86::OR16ri8); goto ReSimplify; in Lower()
577 case X86::ADD32ri8_DB: OutMI.setOpcode(X86::OR32ri8); goto ReSimplify; in Lower()
578 case X86::ADD64ri8_DB: OutMI.setOpcode(X86::OR64ri8); goto ReSimplify; in Lower()
583 case X86::ACQUIRE_MOV8rm: OutMI.setOpcode(X86::MOV8rm); goto ReSimplify; in Lower()
584 case X86::ACQUIRE_MOV16rm: OutMI.setOpcode(X86::MOV16rm); goto ReSimplify; in Lower()
585 case X86::ACQUIRE_MOV32rm: OutMI.setOpcode(X86::MOV32rm); goto ReSimplify; in Lower()
586 case X86::ACQUIRE_MOV64rm: OutMI.setOpcode(X86::MOV64rm); goto ReSimplify; in Lower()
587 case X86::RELEASE_MOV8mr: OutMI.setOpcode(X86::MOV8mr); goto ReSimplify; in Lower()
588 case X86::RELEASE_MOV16mr: OutMI.setOpcode(X86::MOV16mr); goto ReSimplify; in Lower()
589 case X86::RELEASE_MOV32mr: OutMI.setOpcode(X86::MOV32mr); goto ReSimplify; in Lower()
590 case X86::RELEASE_MOV64mr: OutMI.setOpcode(X86::MOV64mr); goto ReSimplify; in Lower()
591 case X86::RELEASE_MOV8mi: OutMI.setOpcode(X86::MOV8mi); goto ReSimplify; in Lower()
592 case X86::RELEASE_MOV16mi: OutMI.setOpcode(X86::MOV16mi); goto ReSimplify; in Lower()
593 case X86::RELEASE_MOV32mi: OutMI.setOpcode(X86::MOV32mi); goto ReSimplify; in Lower()
594 case X86::RELEASE_MOV64mi32: OutMI.setOpcode(X86::MOV64mi32); goto ReSimplify; in Lower()
595 case X86::RELEASE_ADD8mi: OutMI.setOpcode(X86::ADD8mi); goto ReSimplify; in Lower()
596 case X86::RELEASE_ADD32mi: OutMI.setOpcode(X86::ADD32mi); goto ReSimplify; in Lower()
597 case X86::RELEASE_ADD64mi32: OutMI.setOpcode(X86::ADD64mi32); goto ReSimplify; in Lower()
598 case X86::RELEASE_AND8mi: OutMI.setOpcode(X86::AND8mi); goto ReSimplify; in Lower()
599 case X86::RELEASE_AND32mi: OutMI.setOpcode(X86::AND32mi); goto ReSimplify; in Lower()
600 case X86::RELEASE_AND64mi32: OutMI.setOpcode(X86::AND64mi32); goto ReSimplify; in Lower()
601 case X86::RELEASE_OR8mi: OutMI.setOpcode(X86::OR8mi); goto ReSimplify; in Lower()
602 case X86::RELEASE_OR32mi: OutMI.setOpcode(X86::OR32mi); goto ReSimplify; in Lower()
603 case X86::RELEASE_OR64mi32: OutMI.setOpcode(X86::OR64mi32); goto ReSimplify; in Lower()
604 case X86::RELEASE_XOR8mi: OutMI.setOpcode(X86::XOR8mi); goto ReSimplify; in Lower()
605 case X86::RELEASE_XOR32mi: OutMI.setOpcode(X86::XOR32mi); goto ReSimplify; in Lower()
606 case X86::RELEASE_XOR64mi32: OutMI.setOpcode(X86::XOR64mi32); goto ReSimplify; in Lower()
607 case X86::RELEASE_INC8m: OutMI.setOpcode(X86::INC8m); goto ReSimplify; in Lower()
608 case X86::RELEASE_INC16m: OutMI.setOpcode(X86::INC16m); goto ReSimplify; in Lower()
609 case X86::RELEASE_INC32m: OutMI.setOpcode(X86::INC32m); goto ReSimplify; in Lower()
610 case X86::RELEASE_INC64m: OutMI.setOpcode(X86::INC64m); goto ReSimplify; in Lower()
611 case X86::RELEASE_DEC8m: OutMI.setOpcode(X86::DEC8m); goto ReSimplify; in Lower()
612 case X86::RELEASE_DEC16m: OutMI.setOpcode(X86::DEC16m); goto ReSimplify; in Lower()
613 case X86::RELEASE_DEC32m: OutMI.setOpcode(X86::DEC32m); goto ReSimplify; in Lower()
614 case X86::RELEASE_DEC64m: OutMI.setOpcode(X86::DEC64m); goto ReSimplify; in Lower()
623 case X86::MOV8mr_NOREX: in Lower()
624 case X86::MOV8mr: SimplifyShortMoveForm(AsmPrinter, OutMI, X86::MOV8o32a); break; in Lower()
625 case X86::MOV8rm_NOREX: in Lower()
626 case X86::MOV8rm: SimplifyShortMoveForm(AsmPrinter, OutMI, X86::MOV8ao32); break; in Lower()
627 case X86::MOV16mr: SimplifyShortMoveForm(AsmPrinter, OutMI, X86::MOV16o32a); break; in Lower()
628 case X86::MOV16rm: SimplifyShortMoveForm(AsmPrinter, OutMI, X86::MOV16ao32); break; in Lower()
629 case X86::MOV32mr: SimplifyShortMoveForm(AsmPrinter, OutMI, X86::MOV32o32a); break; in Lower()
630 case X86::MOV32rm: SimplifyShortMoveForm(AsmPrinter, OutMI, X86::MOV32ao32); break; in Lower()
632 case X86::ADC8ri: SimplifyShortImmForm(OutMI, X86::ADC8i8); break; in Lower()
633 case X86::ADC16ri: SimplifyShortImmForm(OutMI, X86::ADC16i16); break; in Lower()
634 case X86::ADC32ri: SimplifyShortImmForm(OutMI, X86::ADC32i32); break; in Lower()
635 case X86::ADC64ri32: SimplifyShortImmForm(OutMI, X86::ADC64i32); break; in Lower()
636 case X86::ADD8ri: SimplifyShortImmForm(OutMI, X86::ADD8i8); break; in Lower()
637 case X86::ADD16ri: SimplifyShortImmForm(OutMI, X86::ADD16i16); break; in Lower()
638 case X86::ADD32ri: SimplifyShortImmForm(OutMI, X86::ADD32i32); break; in Lower()
639 case X86::ADD64ri32: SimplifyShortImmForm(OutMI, X86::ADD64i32); break; in Lower()
640 case X86::AND8ri: SimplifyShortImmForm(OutMI, X86::AND8i8); break; in Lower()
641 case X86::AND16ri: SimplifyShortImmForm(OutMI, X86::AND16i16); break; in Lower()
642 case X86::AND32ri: SimplifyShortImmForm(OutMI, X86::AND32i32); break; in Lower()
643 case X86::AND64ri32: SimplifyShortImmForm(OutMI, X86::AND64i32); break; in Lower()
644 case X86::CMP8ri: SimplifyShortImmForm(OutMI, X86::CMP8i8); break; in Lower()
645 case X86::CMP16ri: SimplifyShortImmForm(OutMI, X86::CMP16i16); break; in Lower()
646 case X86::CMP32ri: SimplifyShortImmForm(OutMI, X86::CMP32i32); break; in Lower()
647 case X86::CMP64ri32: SimplifyShortImmForm(OutMI, X86::CMP64i32); break; in Lower()
648 case X86::OR8ri: SimplifyShortImmForm(OutMI, X86::OR8i8); break; in Lower()
649 case X86::OR16ri: SimplifyShortImmForm(OutMI, X86::OR16i16); break; in Lower()
650 case X86::OR32ri: SimplifyShortImmForm(OutMI, X86::OR32i32); break; in Lower()
651 case X86::OR64ri32: SimplifyShortImmForm(OutMI, X86::OR64i32); break; in Lower()
652 case X86::SBB8ri: SimplifyShortImmForm(OutMI, X86::SBB8i8); break; in Lower()
653 case X86::SBB16ri: SimplifyShortImmForm(OutMI, X86::SBB16i16); break; in Lower()
654 case X86::SBB32ri: SimplifyShortImmForm(OutMI, X86::SBB32i32); break; in Lower()
655 case X86::SBB64ri32: SimplifyShortImmForm(OutMI, X86::SBB64i32); break; in Lower()
656 case X86::SUB8ri: SimplifyShortImmForm(OutMI, X86::SUB8i8); break; in Lower()
657 case X86::SUB16ri: SimplifyShortImmForm(OutMI, X86::SUB16i16); break; in Lower()
658 case X86::SUB32ri: SimplifyShortImmForm(OutMI, X86::SUB32i32); break; in Lower()
659 case X86::SUB64ri32: SimplifyShortImmForm(OutMI, X86::SUB64i32); break; in Lower()
660 case X86::TEST8ri: SimplifyShortImmForm(OutMI, X86::TEST8i8); break; in Lower()
661 case X86::TEST16ri: SimplifyShortImmForm(OutMI, X86::TEST16i16); break; in Lower()
662 case X86::TEST32ri: SimplifyShortImmForm(OutMI, X86::TEST32i32); break; in Lower()
663 case X86::TEST64ri32: SimplifyShortImmForm(OutMI, X86::TEST64i32); break; in Lower()
664 case X86::XOR8ri: SimplifyShortImmForm(OutMI, X86::XOR8i8); break; in Lower()
665 case X86::XOR16ri: SimplifyShortImmForm(OutMI, X86::XOR16i16); break; in Lower()
666 case X86::XOR32ri: SimplifyShortImmForm(OutMI, X86::XOR32i32); break; in Lower()
667 case X86::XOR64ri32: SimplifyShortImmForm(OutMI, X86::XOR64i32); break; in Lower()
670 case X86::MOVSX16rr8: in Lower()
671 case X86::MOVSX32rr16: in Lower()
672 case X86::MOVSX64rr32: in Lower()
681 bool is64Bits = MI.getOpcode() == X86::TLS_addr64 || in LowerTlsAddr()
682 MI.getOpcode() == X86::TLS_base_addr64; in LowerTlsAddr()
684 bool needsPadding = MI.getOpcode() == X86::TLS_addr64; in LowerTlsAddr()
689 EmitAndCountInstruction(MCInstBuilder(X86::DATA16_PREFIX)); in LowerTlsAddr()
693 case X86::TLS_addr32: in LowerTlsAddr()
694 case X86::TLS_addr64: in LowerTlsAddr()
697 case X86::TLS_base_addr32: in LowerTlsAddr()
700 case X86::TLS_base_addr64: in LowerTlsAddr()
712 LEA.setOpcode(X86::LEA64r); in LowerTlsAddr()
713 LEA.addOperand(MCOperand::CreateReg(X86::RDI)); // dest in LowerTlsAddr()
714 LEA.addOperand(MCOperand::CreateReg(X86::RIP)); // base in LowerTlsAddr()
720 LEA.setOpcode(X86::LEA32r); in LowerTlsAddr()
721 LEA.addOperand(MCOperand::CreateReg(X86::EAX)); // dest in LowerTlsAddr()
722 LEA.addOperand(MCOperand::CreateReg(X86::EBX)); // base in LowerTlsAddr()
728 LEA.setOpcode(X86::LEA32r); in LowerTlsAddr()
729 LEA.addOperand(MCOperand::CreateReg(X86::EAX)); // dest in LowerTlsAddr()
732 LEA.addOperand(MCOperand::CreateReg(X86::EBX)); // index in LowerTlsAddr()
739 EmitAndCountInstruction(MCInstBuilder(X86::DATA16_PREFIX)); in LowerTlsAddr()
740 EmitAndCountInstruction(MCInstBuilder(X86::DATA16_PREFIX)); in LowerTlsAddr()
741 EmitAndCountInstruction(MCInstBuilder(X86::REX64_PREFIX)); in LowerTlsAddr()
751 EmitAndCountInstruction(MCInstBuilder(is64Bits ? X86::CALL64pcrel32 in LowerTlsAddr()
752 : X86::CALLpcrel32) in LowerTlsAddr()
764 BaseReg = X86::RAX; ScaleVal = 1; in EmitNops()
767 case 1: NumBytes -= 1; Opc = X86::NOOP; break; in EmitNops()
768 case 2: NumBytes -= 2; Opc = X86::XCHG16ar; break; in EmitNops()
769 case 3: NumBytes -= 3; Opc = X86::NOOPL; break; in EmitNops()
770 case 4: NumBytes -= 4; Opc = X86::NOOPL; Displacement = 8; break; in EmitNops()
771 case 5: NumBytes -= 5; Opc = X86::NOOPL; Displacement = 8; in EmitNops()
772 IndexReg = X86::RAX; break; in EmitNops()
773 case 6: NumBytes -= 6; Opc = X86::NOOPW; Displacement = 8; in EmitNops()
774 IndexReg = X86::RAX; break; in EmitNops()
775 case 7: NumBytes -= 7; Opc = X86::NOOPL; Displacement = 512; break; in EmitNops()
776 case 8: NumBytes -= 8; Opc = X86::NOOPL; Displacement = 512; in EmitNops()
777 IndexReg = X86::RAX; break; in EmitNops()
778 case 9: NumBytes -= 9; Opc = X86::NOOPW; Displacement = 512; in EmitNops()
779 IndexReg = X86::RAX; break; in EmitNops()
780 default: NumBytes -= 10; Opc = X86::NOOPW; Displacement = 512; in EmitNops()
781 IndexReg = X86::RAX; SegmentReg = X86::CS; break; in EmitNops()
791 case X86::NOOP: in EmitNops()
794 case X86::XCHG16ar: in EmitNops()
795 OS.EmitInstruction(MCInstBuilder(Opc).addReg(X86::AX), STI); in EmitNops()
797 case X86::NOOPL: in EmitNops()
798 case X86::NOOPW: in EmitNops()
824 call_opcode = X86::CALL64pcrel32; in LowerSTATEPOINT()
832 call_opcode = X86::CALL64pcrel32; in LowerSTATEPOINT()
840 call_opcode = X86::CALL64r; in LowerSTATEPOINT()
889 EmitAndCountInstruction(MCInstBuilder(X86::MOV64ri).addReg(ScratchReg) in LowerPATCHPOINT()
891 EmitAndCountInstruction(MCInstBuilder(X86::CALL64r).addReg(ScratchReg)); in LowerPATCHPOINT()
999 case X86::Int_MemBarrier: in EmitInstruction()
1004 case X86::EH_RETURN: in EmitInstruction()
1005 case X86::EH_RETURN64: { in EmitInstruction()
1012 case X86::TAILJMPr: in EmitInstruction()
1013 case X86::TAILJMPm: in EmitInstruction()
1014 case X86::TAILJMPd: in EmitInstruction()
1015 case X86::TAILJMPr64: in EmitInstruction()
1016 case X86::TAILJMPm64: in EmitInstruction()
1017 case X86::TAILJMPd64: in EmitInstruction()
1018 case X86::TAILJMPr64_REX: in EmitInstruction()
1019 case X86::TAILJMPm64_REX: in EmitInstruction()
1020 case X86::TAILJMPd64_REX: in EmitInstruction()
1025 case X86::TLS_addr32: in EmitInstruction()
1026 case X86::TLS_addr64: in EmitInstruction()
1027 case X86::TLS_base_addr32: in EmitInstruction()
1028 case X86::TLS_base_addr64: in EmitInstruction()
1031 case X86::MOVPC32r: { in EmitInstruction()
1042 EmitAndCountInstruction(MCInstBuilder(X86::CALLpcrel32) in EmitInstruction()
1049 EmitAndCountInstruction(MCInstBuilder(X86::POP32r) in EmitInstruction()
1054 case X86::ADD32ri: { in EmitInstruction()
1080 EmitAndCountInstruction(MCInstBuilder(X86::ADD32ri) in EmitInstruction()
1096 case X86::MORESTACK_RET: in EmitInstruction()
1100 case X86::MORESTACK_RET_RESTORE_R10: in EmitInstruction()
1103 EmitAndCountInstruction(MCInstBuilder(X86::MOV64rr) in EmitInstruction()
1104 .addReg(X86::R10) in EmitInstruction()
1105 .addReg(X86::RAX)); in EmitInstruction()
1108 case X86::SEH_PushReg: in EmitInstruction()
1112 case X86::SEH_SaveReg: in EmitInstruction()
1117 case X86::SEH_SaveXMM: in EmitInstruction()
1122 case X86::SEH_StackAlloc: in EmitInstruction()
1126 case X86::SEH_SetFrame: in EmitInstruction()
1131 case X86::SEH_PushFrame: in EmitInstruction()
1135 case X86::SEH_EndPrologue: in EmitInstruction()
1139 case X86::SEH_Epilogue: { in EmitInstruction()
1147 EmitAndCountInstruction(MCInstBuilder(X86::NOOP)); in EmitInstruction()
1157 case X86::PSHUFBrm: in EmitInstruction()
1158 case X86::VPSHUFBrm: in EmitInstruction()
1159 case X86::VPSHUFBYrm: { in EmitInstruction()
1176 case X86::VPERMILPSrm: in EmitInstruction()
1177 case X86::VPERMILPDrm: in EmitInstruction()
1178 case X86::VPERMILPSYrm: in EmitInstruction()
1179 case X86::VPERMILPDYrm: { in EmitInstruction()
1199 case X86::MOVAPDrm: in EmitInstruction()
1200 case X86::VMOVAPDrm: in EmitInstruction()
1201 case X86::VMOVAPDYrm: in EmitInstruction()
1202 case X86::MOVUPDrm: in EmitInstruction()
1203 case X86::VMOVUPDrm: in EmitInstruction()
1204 case X86::VMOVUPDYrm: in EmitInstruction()
1205 case X86::MOVAPSrm: in EmitInstruction()
1206 case X86::VMOVAPSrm: in EmitInstruction()
1207 case X86::VMOVAPSYrm: in EmitInstruction()
1208 case X86::MOVUPSrm: in EmitInstruction()
1209 case X86::VMOVUPSrm: in EmitInstruction()
1210 case X86::VMOVUPSYrm: in EmitInstruction()
1211 case X86::MOVDQArm: in EmitInstruction()
1212 case X86::VMOVDQArm: in EmitInstruction()
1213 case X86::VMOVDQAYrm: in EmitInstruction()
1214 case X86::MOVDQUrm: in EmitInstruction()
1215 case X86::VMOVDQUrm: in EmitInstruction()
1216 case X86::VMOVDQUYrm: in EmitInstruction()