Lines Matching refs:mtc1
135 ; CHECK: mtc1 $[[REG_FPCONST]], $f12
151 ; CHECK-DAG: mtc1 $[[REG_FPCONST]], $f12
154 ; CHECK-DAG: mtc1 $[[REG_FPCONST_3]], $f14
170 ; CHECK-DAG: mtc1 $[[REG_FPCONST]], $f12
188 ; CHECK-DAG: mtc1 $[[REG_FPCONST]], $f12
206 ; CHECK-DAG: mtc1 $[[REG_FPCONST]], $f12
230 ; mips32-DAG: mtc1 $[[REG_FPCONST_4]], $f12
231 ; mips32-DAG: mtc1 $[[REG_FPCONST_2]], $f13
239 ; mips32r2-DAG: mtc1 $[[REG_FPCONST_4]], $f12
259 ; mips32-DAG: mtc1 $[[REG_FPCONST_4]], $f12
260 ; mips32-DAG: mtc1 $[[REG_FPCONST_2]], $f13
265 ; mips32-DAG: mtc1 $[[REG_FPCONST_4]], $f14
266 ; mips32-DAG: mtc1 $[[REG_FPCONST_2]], $f15
274 ; mips32r2-DAG: mtc1 $[[REG_FPCONST_4]], $f12
280 ; mips32r2-DAG: mtc1 $[[REG_FPCONST_4]], $f14
298 ; CHECK-DAG: mtc1 $[[REGF_2]], $f[[REGF_3:[0-9]+]]
323 ; CHECK: mtc1 $[[REGF_2]], $f[[REGF_3:[0-9]+]]
327 ; CHECK2: mtc1 $[[REGF2_2]], $f[[REGF2_3:[0-9]+]]
347 ; CHECK-DAG: mtc1 $[[REGF_2]], $f[[REGF_3:[0-9]+]]
370 ; CHECK-DAG: mtc1 $[[REGF_2]], $f[[REGF_3:[0-9]+]]
375 ; CHECK2: mtc1 $[[REGF2_2]], $f[[REGF2_3:[0-9]+]]
399 ; CHECK-DAG: mtc1 $[[REGF_2]], $f[[REGF_3:[0-9]+]]
403 ; CHECK2: mtc1 $[[REGF2_2]], $f[[REGF2_3:[0-9]+]]
425 ; CHECK-DAG: mtc1 $[[REGF_2]], $f[[REGF_3:[0-9]+]]