Lines Matching refs:coerce
111 define i64 @test__builtin_mips_dpau_h_qbl1(i32 %i0, i32, i64 %a0, i32 %a1.coerce, i32 %a2.coerce) n…
115 %1 = bitcast i32 %a1.coerce to <4 x i8>
116 %2 = bitcast i32 %a2.coerce to <4 x i8>
123 define i64 @test__builtin_mips_dpau_h_qbr1(i32 %i0, i32, i64 %a0, i32 %a1.coerce, i32 %a2.coerce) n…
127 %1 = bitcast i32 %a1.coerce to <4 x i8>
128 %2 = bitcast i32 %a2.coerce to <4 x i8>
135 define i64 @test__builtin_mips_dpsu_h_qbl1(i32 %i0, i32, i64 %a0, i32 %a1.coerce, i32 %a2.coerce) n…
139 %1 = bitcast i32 %a1.coerce to <4 x i8>
140 %2 = bitcast i32 %a2.coerce to <4 x i8>
147 define i64 @test__builtin_mips_dpsu_h_qbr1(i32 %i0, i32, i64 %a0, i32 %a1.coerce, i32 %a2.coerce) n…
151 %1 = bitcast i32 %a1.coerce to <4 x i8>
152 %2 = bitcast i32 %a2.coerce to <4 x i8>
159 define i64 @test__builtin_mips_dpaq_s_w_ph1(i32 %i0, i32, i64 %a0, i32 %a1.coerce, i32 %a2.coerce) …
163 %1 = bitcast i32 %a1.coerce to <2 x i16>
164 %2 = bitcast i32 %a2.coerce to <2 x i16>
181 define i64 @test__builtin_mips_dpsq_s_w_ph1(i32 %i0, i32, i64 %a0, i32 %a1.coerce, i32 %a2.coerce) …
185 %1 = bitcast i32 %a1.coerce to <2 x i16>
186 %2 = bitcast i32 %a2.coerce to <2 x i16>
203 define i64 @test__builtin_mips_mulsaq_s_w_ph1(i32 %i0, i32, i64 %a0, i32 %a1.coerce, i32 %a2.coerce…
207 %1 = bitcast i32 %a1.coerce to <2 x i16>
208 %2 = bitcast i32 %a2.coerce to <2 x i16>
215 define i64 @test__builtin_mips_maq_s_w_phl1(i32 %i0, i32, i64 %a0, i32 %a1.coerce, i32 %a2.coerce) …
219 %1 = bitcast i32 %a1.coerce to <2 x i16>
220 %2 = bitcast i32 %a2.coerce to <2 x i16>
227 define i64 @test__builtin_mips_maq_s_w_phr1(i32 %i0, i32, i64 %a0, i32 %a1.coerce, i32 %a2.coerce) …
231 %1 = bitcast i32 %a1.coerce to <2 x i16>
232 %2 = bitcast i32 %a2.coerce to <2 x i16>
239 define i64 @test__builtin_mips_maq_sa_w_phl1(i32 %i0, i32, i64 %a0, i32 %a1.coerce, i32 %a2.coerce)…
243 %1 = bitcast i32 %a1.coerce to <2 x i16>
244 %2 = bitcast i32 %a2.coerce to <2 x i16>
251 define i64 @test__builtin_mips_maq_sa_w_phr1(i32 %i0, i32, i64 %a0, i32 %a1.coerce, i32 %a2.coerce)…
255 %1 = bitcast i32 %a1.coerce to <2 x i16>
256 %2 = bitcast i32 %a2.coerce to <2 x i16>
361 define { i32 } @test__builtin_mips_addq_ph1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
365 %0 = bitcast i32 %a0.coerce to <2 x i16>
366 %1 = bitcast i32 %a1.coerce to <2 x i16>
375 define { i32 } @test__builtin_mips_addq_s_ph1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
379 %0 = bitcast i32 %a0.coerce to <2 x i16>
380 %1 = bitcast i32 %a1.coerce to <2 x i16>
399 define { i32 } @test__builtin_mips_addu_qb1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
403 %0 = bitcast i32 %a0.coerce to <4 x i8>
404 %1 = bitcast i32 %a1.coerce to <4 x i8>
413 define { i32 } @test__builtin_mips_addu_s_qb1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
417 %0 = bitcast i32 %a0.coerce to <4 x i8>
418 %1 = bitcast i32 %a1.coerce to <4 x i8>
427 define { i32 } @test__builtin_mips_subq_ph1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
431 %0 = bitcast i32 %a0.coerce to <2 x i16>
432 %1 = bitcast i32 %a1.coerce to <2 x i16>
441 define { i32 } @test__builtin_mips_subq_s_ph1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
445 %0 = bitcast i32 %a0.coerce to <2 x i16>
446 %1 = bitcast i32 %a1.coerce to <2 x i16>
465 define { i32 } @test__builtin_mips_subu_qb1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
469 %0 = bitcast i32 %a0.coerce to <4 x i8>
470 %1 = bitcast i32 %a1.coerce to <4 x i8>
479 define { i32 } @test__builtin_mips_subu_s_qb1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
483 %0 = bitcast i32 %a0.coerce to <4 x i8>
484 %1 = bitcast i32 %a1.coerce to <4 x i8>
523 define i32 @test__builtin_mips_raddu_w_qb1(i32 %i0, i32 %a0.coerce) nounwind readnone {
527 %0 = bitcast i32 %a0.coerce to <4 x i8>
534 define { i32 } @test__builtin_mips_muleu_s_ph_qbl1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwin…
538 %0 = bitcast i32 %a0.coerce to <4 x i8>
539 %1 = bitcast i32 %a1.coerce to <2 x i16>
548 define { i32 } @test__builtin_mips_muleu_s_ph_qbr1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwin…
552 %0 = bitcast i32 %a0.coerce to <4 x i8>
553 %1 = bitcast i32 %a1.coerce to <2 x i16>
562 define { i32 } @test__builtin_mips_mulq_rs_ph1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
566 %0 = bitcast i32 %a0.coerce to <2 x i16>
567 %1 = bitcast i32 %a1.coerce to <2 x i16>
576 define i32 @test__builtin_mips_muleq_s_w_phl1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
580 %0 = bitcast i32 %a0.coerce to <2 x i16>
581 %1 = bitcast i32 %a1.coerce to <2 x i16>
588 define i32 @test__builtin_mips_muleq_s_w_phr1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
592 %0 = bitcast i32 %a0.coerce to <2 x i16>
593 %1 = bitcast i32 %a1.coerce to <2 x i16>
600 define { i32 } @test__builtin_mips_precrq_qb_ph1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind …
604 %0 = bitcast i32 %a0.coerce to <2 x i16>
605 %1 = bitcast i32 %a1.coerce to <2 x i16>
638 define { i32 } @test__builtin_mips_precrqu_s_qb_ph1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwi…
642 %0 = bitcast i32 %a0.coerce to <2 x i16>
643 %1 = bitcast i32 %a1.coerce to <2 x i16>
653 define i32 @test__builtin_mips_cmpu_eq_qb1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
657 %0 = bitcast i32 %a0.coerce to <4 x i8>
658 %1 = bitcast i32 %a1.coerce to <4 x i8>
668 define i32 @test__builtin_mips_cmpu_lt_qb1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
672 %0 = bitcast i32 %a0.coerce to <4 x i8>
673 %1 = bitcast i32 %a1.coerce to <4 x i8>
681 define i32 @test__builtin_mips_cmpu_le_qb1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
685 %0 = bitcast i32 %a0.coerce to <4 x i8>
686 %1 = bitcast i32 %a1.coerce to <4 x i8>
694 define i32 @test__builtin_mips_cmpgu_eq_qb1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
698 %0 = bitcast i32 %a0.coerce to <4 x i8>
699 %1 = bitcast i32 %a1.coerce to <4 x i8>
706 define i32 @test__builtin_mips_cmpgu_lt_qb1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
710 %0 = bitcast i32 %a0.coerce to <4 x i8>
711 %1 = bitcast i32 %a1.coerce to <4 x i8>
718 define i32 @test__builtin_mips_cmpgu_le_qb1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
722 %0 = bitcast i32 %a0.coerce to <4 x i8>
723 %1 = bitcast i32 %a1.coerce to <4 x i8>
730 define i32 @test__builtin_mips_cmp_eq_ph1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
734 %0 = bitcast i32 %a0.coerce to <2 x i16>
735 %1 = bitcast i32 %a1.coerce to <2 x i16>
743 define i32 @test__builtin_mips_cmp_lt_ph1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
747 %0 = bitcast i32 %a0.coerce to <2 x i16>
748 %1 = bitcast i32 %a1.coerce to <2 x i16>
756 define i32 @test__builtin_mips_cmp_le_ph1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind {
760 %0 = bitcast i32 %a0.coerce to <2 x i16>
761 %1 = bitcast i32 %a1.coerce to <2 x i16>
769 define { i32 } @test__builtin_mips_pick_qb1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind reado…
773 %0 = bitcast i32 %a0.coerce to <4 x i8>
774 %1 = bitcast i32 %a1.coerce to <4 x i8>
784 define { i32 } @test__builtin_mips_pick_ph1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind reado…
788 %0 = bitcast i32 %a0.coerce to <2 x i16>
789 %1 = bitcast i32 %a1.coerce to <2 x i16>
799 define { i32 } @test__builtin_mips_packrl_ph1(i32 %i0, i32 %a0.coerce, i32 %a1.coerce) nounwind rea…
803 %0 = bitcast i32 %a0.coerce to <2 x i16>
804 %1 = bitcast i32 %a1.coerce to <2 x i16>
813 define { i32 } @test__builtin_mips_shll_qb1(i32 %i0, i32 %a0.coerce) nounwind {
817 %0 = bitcast i32 %a0.coerce to <4 x i8>
826 define { i32 } @test__builtin_mips_shll_qb2(i32 %i0, i32 %a0.coerce, i32 %a1) nounwind {
830 %0 = bitcast i32 %a0.coerce to <4 x i8>
837 define { i32 } @test__builtin_mips_shll_ph1(i32 %i0, i32 %a0.coerce) nounwind {
841 %0 = bitcast i32 %a0.coerce to <2 x i16>
850 define { i32 } @test__builtin_mips_shll_ph2(i32 %i0, i32 %a0.coerce, i32 %a1) nounwind {
854 %0 = bitcast i32 %a0.coerce to <2 x i16>
861 define { i32 } @test__builtin_mips_shll_s_ph1(i32 %i0, i32 %a0.coerce) nounwind {
865 %0 = bitcast i32 %a0.coerce to <2 x i16>
874 define { i32 } @test__builtin_mips_shll_s_ph2(i32 %i0, i32 %a0.coerce, i32 %a1) nounwind {
878 %0 = bitcast i32 %a0.coerce to <2 x i16>
903 define { i32 } @test__builtin_mips_shrl_qb1(i32 %i0, i32 %a0.coerce) nounwind readnone {
907 %0 = bitcast i32 %a0.coerce to <4 x i8>
916 define { i32 } @test__builtin_mips_shrl_qb2(i32 %i0, i32 %a0.coerce, i32 %a1) nounwind readnone {
920 %0 = bitcast i32 %a0.coerce to <4 x i8>
927 define { i32 } @test__builtin_mips_shra_ph1(i32 %i0, i32 %a0.coerce) nounwind readnone {
931 %0 = bitcast i32 %a0.coerce to <2 x i16>
940 define { i32 } @test__builtin_mips_shra_ph2(i32 %i0, i32 %a0.coerce, i32 %a1) nounwind readnone {
944 %0 = bitcast i32 %a0.coerce to <2 x i16>
951 define { i32 } @test__builtin_mips_shra_r_ph1(i32 %i0, i32 %a0.coerce) nounwind readnone {
955 %0 = bitcast i32 %a0.coerce to <2 x i16>
964 define { i32 } @test__builtin_mips_shra_r_ph2(i32 %i0, i32 %a0.coerce, i32 %a1) nounwind readnone {
968 %0 = bitcast i32 %a0.coerce to <2 x i16>
993 define { i32 } @test__builtin_mips_absq_s_ph1(i32 %i0, i32 %a0.coerce) nounwind {
997 %0 = bitcast i32 %a0.coerce to <2 x i16>
1016 define i32 @test__builtin_mips_preceq_w_phl1(i32 %i0, i32 %a0.coerce) nounwind readnone {
1020 %0 = bitcast i32 %a0.coerce to <2 x i16>
1027 define i32 @test__builtin_mips_preceq_w_phr1(i32 %i0, i32 %a0.coerce) nounwind readnone {
1031 %0 = bitcast i32 %a0.coerce to <2 x i16>
1038 define { i32 } @test__builtin_mips_precequ_ph_qbl1(i32 %i0, i32 %a0.coerce) nounwind readnone {
1042 %0 = bitcast i32 %a0.coerce to <4 x i8>
1051 define { i32 } @test__builtin_mips_precequ_ph_qbr1(i32 %i0, i32 %a0.coerce) nounwind readnone {
1055 %0 = bitcast i32 %a0.coerce to <4 x i8>
1064 define { i32 } @test__builtin_mips_precequ_ph_qbla1(i32 %i0, i32 %a0.coerce) nounwind readnone {
1068 %0 = bitcast i32 %a0.coerce to <4 x i8>
1077 define { i32 } @test__builtin_mips_precequ_ph_qbra1(i32 %i0, i32 %a0.coerce) nounwind readnone {
1081 %0 = bitcast i32 %a0.coerce to <4 x i8>
1090 define { i32 } @test__builtin_mips_preceu_ph_qbl1(i32 %i0, i32 %a0.coerce) nounwind readnone {
1094 %0 = bitcast i32 %a0.coerce to <4 x i8>
1103 define { i32 } @test__builtin_mips_preceu_ph_qbr1(i32 %i0, i32 %a0.coerce) nounwind readnone {
1107 %0 = bitcast i32 %a0.coerce to <4 x i8>
1116 define { i32 } @test__builtin_mips_preceu_ph_qbla1(i32 %i0, i32 %a0.coerce) nounwind readnone {
1120 %0 = bitcast i32 %a0.coerce to <4 x i8>
1129 define { i32 } @test__builtin_mips_preceu_ph_qbra1(i32 %i0, i32 %a0.coerce) nounwind readnone {
1133 %0 = bitcast i32 %a0.coerce to <4 x i8>