Lines Matching refs:v8i16
6 @v8i16 = global <8 x i16> <i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>
51 …store volatile <8 x i16> <i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>, <8 x i16>*@v8i16
54 …store volatile <8 x i16> <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>, <8 x i16>*@v8i16
57 …tore volatile <8 x i16> <i16 1, i16 1, i16 1, i16 2, i16 1, i16 1, i16 1, i16 31>, <8 x i16>*@v8i16
61 … <i16 1028, i16 1028, i16 1028, i16 1028, i16 1028, i16 1028, i16 1028, i16 1028>, <8 x i16>*@v8i16
64 …store volatile <8 x i16> <i16 1, i16 2, i16 1, i16 2, i16 1, i16 2, i16 1, i16 2>, <8 x i16>*@v8i16
71 …store volatile <8 x i16> <i16 1, i16 2, i16 3, i16 4, i16 1, i16 2, i16 3, i16 4>, <8 x i16>*@v8i16
218 store volatile <8 x i16> %8, <8 x i16>*@v8i16
280 %1 = load <8 x i16>, <8 x i16>* @v8i16
352 %1 = load <8 x i16>, <8 x i16>* @v8i16
428 %1 = load <8 x i16>, <8 x i16>* @v8i16
429 ; MIPS32-AE-DAG: lw [[PTR_V:\$[0-9]+]], %got(v8i16)(
524 %1 = load <8 x i16>, <8 x i16>* @v8i16
525 ; MIPS32-AE-DAG: lw [[PTR_V:\$[0-9]+]], %got(v8i16)(
618 %1 = load <8 x i16>, <8 x i16>* @v8i16
630 store <8 x i16> %2, <8 x i16>* @v8i16
708 %1 = load <8 x i16>, <8 x i16>* @v8i16
728 store <8 x i16> %3, <8 x i16>* @v8i16