Lines Matching refs:addv
9 %1 = tail call <16 x i8> @llvm.mips.addv.b(<16 x i8> %0, <16 x i8> %0)
11 %3 = tail call <16 x i8> @llvm.mips.addv.b(<16 x i8> %2, <16 x i8> %2)
18 ; LITENDIAN: addv.b [[R2:\$w[0-9]+]], [[R1]], [[R1]]
19 ; LITENDIAN: addv.b [[R3:\$w[0-9]+]], [[R2]], [[R2]]
25 ; BIGENDIAN: addv.b [[R2:\$w[0-9]+]], [[R1]], [[R1]]
26 ; BIGENDIAN: addv.b [[R3:\$w[0-9]+]], [[R2]], [[R2]]
33 %1 = tail call <16 x i8> @llvm.mips.addv.b(<16 x i8> %0, <16 x i8> %0)
35 %3 = tail call <8 x i16> @llvm.mips.addv.h(<8 x i16> %2, <8 x i16> %2)
42 ; LITENDIAN: addv.b [[R2:\$w[0-9]+]], [[R1]], [[R1]]
43 ; LITENDIAN: addv.h [[R3:\$w[0-9]+]], [[R2]], [[R2]]
49 ; BIGENDIAN: addv.b [[R2:\$w[0-9]+]], [[R1]], [[R1]]
51 ; BIGENDIAN: addv.h [[R4:\$w[0-9]+]], [[R3]], [[R3]]
60 %1 = tail call <16 x i8> @llvm.mips.addv.b(<16 x i8> %0, <16 x i8> %0)
68 ; LITENDIAN: addv.b [[R2:\$w[0-9]+]], [[R1]], [[R1]]
74 ; BIGENDIAN: addv.b [[R2:\$w[0-9]+]], [[R1]], [[R1]]
81 %1 = tail call <16 x i8> @llvm.mips.addv.b(<16 x i8> %0, <16 x i8> %0)
83 %3 = tail call <4 x i32> @llvm.mips.addv.w(<4 x i32> %2, <4 x i32> %2)
90 ; LITENDIAN: addv.b [[R2:\$w[0-9]+]], [[R1]], [[R1]]
91 ; LITENDIAN: addv.w [[R3:\$w[0-9]+]], [[R2]], [[R2]]
97 ; BIGENDIAN: addv.b [[R2:\$w[0-9]+]], [[R1]], [[R1]]
99 ; BIGENDIAN: addv.w [[R4:\$w[0-9]+]], [[R3]], [[R3]]
106 %1 = tail call <16 x i8> @llvm.mips.addv.b(<16 x i8> %0, <16 x i8> %0)
115 ; LITENDIAN: addv.b [[R2:\$w[0-9]+]], [[R1]], [[R1]]
122 ; BIGENDIAN: addv.b [[R2:\$w[0-9]+]], [[R1]], [[R1]]
131 %1 = tail call <16 x i8> @llvm.mips.addv.b(<16 x i8> %0, <16 x i8> %0)
133 %3 = tail call <2 x i64> @llvm.mips.addv.d(<2 x i64> %2, <2 x i64> %2)
140 ; LITENDIAN: addv.b [[R2:\$w[0-9]+]], [[R1]], [[R1]]
141 ; LITENDIAN: addv.d [[R3:\$w[0-9]+]], [[R2]], [[R2]]
147 ; BIGENDIAN: addv.b [[R2:\$w[0-9]+]], [[R1]], [[R1]]
150 ; BIGENDIAN: addv.d [[R4:\$w[0-9]+]], [[R3]], [[R3]]
157 %1 = tail call <16 x i8> @llvm.mips.addv.b(<16 x i8> %0, <16 x i8> %0)
166 ; LITENDIAN: addv.b [[R2:\$w[0-9]+]], [[R1]], [[R1]]
173 ; BIGENDIAN: addv.b [[R2:\$w[0-9]+]], [[R1]], [[R1]]
183 %1 = tail call <8 x i16> @llvm.mips.addv.h(<8 x i16> %0, <8 x i16> %0)
185 %3 = tail call <16 x i8> @llvm.mips.addv.b(<16 x i8> %2, <16 x i8> %2)
192 ; LITENDIAN: addv.h [[R2:\$w[0-9]+]], [[R1]], [[R1]]
193 ; LITENDIAN: addv.b [[R3:\$w[0-9]+]], [[R2]], [[R2]]
199 ; BIGENDIAN: addv.h [[R2:\$w[0-9]+]], [[R1]], [[R1]]
201 ; BIGENDIAN: addv.b [[R4:\$w[0-9]+]], [[R2]], [[R2]]
208 %1 = tail call <8 x i16> @llvm.mips.addv.h(<8 x i16> %0, <8 x i16> %0)
210 %3 = tail call <8 x i16> @llvm.mips.addv.h(<8 x i16> %2, <8 x i16> %2)
217 ; LITENDIAN: addv.h [[R2:\$w[0-9]+]], [[R1]], [[R1]]
218 ; LITENDIAN: addv.h [[R3:\$w[0-9]+]], [[R2]], [[R2]]
224 ; BIGENDIAN: addv.h [[R2:\$w[0-9]+]], [[R1]], [[R1]]
225 ; BIGENDIAN: addv.h [[R3:\$w[0-9]+]], [[R2]], [[R2]]
234 %1 = tail call <8 x i16> @llvm.mips.addv.h(<8 x i16> %0, <8 x i16> %0)
242 ; LITENDIAN: addv.h [[R2:\$w[0-9]+]], [[R1]], [[R1]]
248 ; BIGENDIAN: addv.h [[R2:\$w[0-9]+]], [[R1]], [[R1]]
255 %1 = tail call <8 x i16> @llvm.mips.addv.h(<8 x i16> %0, <8 x i16> %0)
257 %3 = tail call <4 x i32> @llvm.mips.addv.w(<4 x i32> %2, <4 x i32> %2)
264 ; LITENDIAN: addv.h [[R2:\$w[0-9]+]], [[R1]], [[R1]]
265 ; LITENDIAN: addv.w [[R3:\$w[0-9]+]], [[R2]], [[R2]]
271 ; BIGENDIAN: addv.h [[R2:\$w[0-9]+]], [[R1]], [[R1]]
273 ; BIGENDIAN: addv.w [[R4:\$w[0-9]+]], [[R3]], [[R3]]
280 %1 = tail call <8 x i16> @llvm.mips.addv.h(<8 x i16> %0, <8 x i16> %0)
289 ; LITENDIAN: addv.h [[R2:\$w[0-9]+]], [[R1]], [[R1]]
296 ; BIGENDIAN: addv.h [[R2:\$w[0-9]+]], [[R1]], [[R1]]
305 %1 = tail call <8 x i16> @llvm.mips.addv.h(<8 x i16> %0, <8 x i16> %0)
307 %3 = tail call <2 x i64> @llvm.mips.addv.d(<2 x i64> %2, <2 x i64> %2)
314 ; LITENDIAN: addv.h [[R2:\$w[0-9]+]], [[R1]], [[R1]]
315 ; LITENDIAN: addv.d [[R3:\$w[0-9]+]], [[R2]], [[R2]]
321 ; BIGENDIAN: addv.h [[R2:\$w[0-9]+]], [[R1]], [[R1]]
323 ; BIGENDIAN: addv.d [[R4:\$w[0-9]+]], [[R3]], [[R3]]
330 %1 = tail call <8 x i16> @llvm.mips.addv.h(<8 x i16> %0, <8 x i16> %0)
339 ; LITENDIAN: addv.h [[R2:\$w[0-9]+]], [[R1]], [[R1]]
346 ; BIGENDIAN: addv.h [[R2:\$w[0-9]+]], [[R1]], [[R1]]
359 %2 = tail call <16 x i8> @llvm.mips.addv.b(<16 x i8> %1, <16 x i8> %1)
366 ; LITENDIAN: addv.b [[R3:\$w[0-9]+]], [[R1]], [[R1]]
373 ; BIGENDIAN: addv.b [[R4:\$w[0-9]+]], [[R2]], [[R2]]
383 %2 = tail call <8 x i16> @llvm.mips.addv.h(<8 x i16> %1, <8 x i16> %1)
390 ; LITENDIAN: addv.h [[R2:\$w[0-9]+]], [[R1]], [[R1]]
396 ; BIGENDIAN: addv.h [[R2:\$w[0-9]+]], [[R1]], [[R1]]
428 %2 = tail call <4 x i32> @llvm.mips.addv.w(<4 x i32> %1, <4 x i32> %1)
435 ; LITENDIAN: addv.w [[R2:\$w[0-9]+]], [[R1]], [[R1]]
442 ; BIGENDIAN: addv.w [[R3:\$w[0-9]+]], [[R2]], [[R2]]
476 %2 = tail call <2 x i64> @llvm.mips.addv.d(<2 x i64> %1, <2 x i64> %1)
483 ; LITENDIAN: addv.d [[R2:\$w[0-9]+]], [[R1]], [[R1]]
490 ; BIGENDIAN: addv.d [[R3:\$w[0-9]+]], [[R2]], [[R2]]
522 %1 = tail call <4 x i32> @llvm.mips.addv.w(<4 x i32> %0, <4 x i32> %0)
524 %3 = tail call <16 x i8> @llvm.mips.addv.b(<16 x i8> %2, <16 x i8> %2)
531 ; LITENDIAN: addv.w [[R2:\$w[0-9]+]], [[R1]], [[R1]]
532 ; LITENDIAN: addv.b [[R3:\$w[0-9]+]], [[R2]], [[R2]]
538 ; BIGENDIAN: addv.w [[R2:\$w[0-9]+]], [[R1]], [[R1]]
540 ; BIGENDIAN: addv.b [[R4:\$w[0-9]+]], [[R3]], [[R3]]
547 %1 = tail call <4 x i32> @llvm.mips.addv.w(<4 x i32> %0, <4 x i32> %0)
549 %3 = tail call <8 x i16> @llvm.mips.addv.h(<8 x i16> %2, <8 x i16> %2)
556 ; LITENDIAN: addv.w [[R2:\$w[0-9]+]], [[R1]], [[R1]]
557 ; LITENDIAN: addv.h [[R3:\$w[0-9]+]], [[R2]], [[R2]]
563 ; BIGENDIAN: addv.w [[R2:\$w[0-9]+]], [[R1]], [[R1]]
565 ; BIGENDIAN: addv.h [[R4:\$w[0-9]+]], [[R3]], [[R3]]
574 %1 = tail call <4 x i32> @llvm.mips.addv.w(<4 x i32> %0, <4 x i32> %0)
582 ; LITENDIAN: addv.w [[R2:\$w[0-9]+]], [[R1]], [[R1]]
588 ; BIGENDIAN: addv.w [[R2:\$w[0-9]+]], [[R1]], [[R1]]
595 %1 = tail call <4 x i32> @llvm.mips.addv.w(<4 x i32> %0, <4 x i32> %0)
597 %3 = tail call <4 x i32> @llvm.mips.addv.w(<4 x i32> %2, <4 x i32> %2)
604 ; LITENDIAN: addv.w [[R2:\$w[0-9]+]], [[R1]], [[R1]]
605 ; LITENDIAN: addv.w [[R3:\$w[0-9]+]], [[R2]], [[R2]]
611 ; BIGENDIAN: addv.w [[R2:\$w[0-9]+]], [[R1]], [[R1]]
612 ; BIGENDIAN: addv.w [[R3:\$w[0-9]+]], [[R2]], [[R2]]
619 %1 = tail call <4 x i32> @llvm.mips.addv.w(<4 x i32> %0, <4 x i32> %0)
628 ; LITENDIAN: addv.w [[R2:\$w[0-9]+]], [[R1]], [[R1]]
635 ; BIGENDIAN: addv.w [[R2:\$w[0-9]+]], [[R1]], [[R1]]
643 %1 = tail call <4 x i32> @llvm.mips.addv.w(<4 x i32> %0, <4 x i32> %0)
645 %3 = tail call <2 x i64> @llvm.mips.addv.d(<2 x i64> %2, <2 x i64> %2)
652 ; LITENDIAN: addv.w [[R2:\$w[0-9]+]], [[R1]], [[R1]]
653 ; LITENDIAN: addv.d [[R3:\$w[0-9]+]], [[R2]], [[R2]]
659 ; BIGENDIAN: addv.w [[R2:\$w[0-9]+]], [[R1]], [[R1]]
661 ; BIGENDIAN: addv.d [[R4:\$w[0-9]+]], [[R3]], [[R3]]
668 %1 = tail call <4 x i32> @llvm.mips.addv.w(<4 x i32> %0, <4 x i32> %0)
677 ; LITENDIAN: addv.w [[R2:\$w[0-9]+]], [[R1]], [[R1]]
684 ; BIGENDIAN: addv.w [[R2:\$w[0-9]+]], [[R1]], [[R1]]
695 %3 = tail call <16 x i8> @llvm.mips.addv.b(<16 x i8> %2, <16 x i8> %2)
703 ; LITENDIAN: addv.b [[R3:\$w[0-9]+]], [[R2]], [[R2]]
711 ; BIGENDIAN: addv.b [[R4:\$w[0-9]+]], [[R3]], [[R3]]
720 %3 = tail call <8 x i16> @llvm.mips.addv.h(<8 x i16> %2, <8 x i16> %2)
728 ; LITENDIAN: addv.h [[R3:\$w[0-9]+]], [[R2]], [[R2]]
736 ; BIGENDIAN: addv.h [[R4:\$w[0-9]+]], [[R3]], [[R3]]
768 %3 = tail call <4 x i32> @llvm.mips.addv.w(<4 x i32> %2, <4 x i32> %2)
776 ; LITENDIAN: addv.w [[R3:\$w[0-9]+]], [[R2]], [[R2]]
783 ; BIGENDIAN: addv.w [[R3:\$w[0-9]+]], [[R2]], [[R2]]
816 %3 = tail call <2 x i64> @llvm.mips.addv.d(<2 x i64> %2, <2 x i64> %2)
824 ; LITENDIAN: addv.d [[R3:\$w[0-9]+]], [[R2]], [[R2]]
832 ; BIGENDIAN: addv.d [[R4:\$w[0-9]+]], [[R3]], [[R3]]
864 %1 = tail call <2 x i64> @llvm.mips.addv.d(<2 x i64> %0, <2 x i64> %0)
866 %3 = tail call <16 x i8> @llvm.mips.addv.b(<16 x i8> %2, <16 x i8> %2)
873 ; LITENDIAN: addv.d [[R2:\$w[0-9]+]], [[R1]], [[R1]]
874 ; LITENDIAN: addv.b [[R3:\$w[0-9]+]], [[R2]], [[R2]]
880 ; BIGENDIAN: addv.d [[R2:\$w[0-9]+]], [[R1]], [[R1]]
883 ; BIGENDIAN: addv.b [[R4:\$w[0-9]+]], [[R3]], [[R3]]
890 %1 = tail call <2 x i64> @llvm.mips.addv.d(<2 x i64> %0, <2 x i64> %0)
892 %3 = tail call <8 x i16> @llvm.mips.addv.h(<8 x i16> %2, <8 x i16> %2)
899 ; LITENDIAN: addv.d [[R2:\$w[0-9]+]], [[R1]], [[R1]]
900 ; LITENDIAN: addv.h [[R3:\$w[0-9]+]], [[R2]], [[R2]]
906 ; BIGENDIAN: addv.d [[R2:\$w[0-9]+]], [[R1]], [[R1]]
908 ; BIGENDIAN: addv.h [[R4:\$w[0-9]+]], [[R3]], [[R3]]
917 %1 = tail call <2 x i64> @llvm.mips.addv.d(<2 x i64> %0, <2 x i64> %0)
925 ; LITENDIAN: addv.d [[R2:\$w[0-9]+]], [[R1]], [[R1]]
931 ; BIGENDIAN: addv.d [[R2:\$w[0-9]+]], [[R1]], [[R1]]
938 %1 = tail call <2 x i64> @llvm.mips.addv.d(<2 x i64> %0, <2 x i64> %0)
940 %3 = tail call <4 x i32> @llvm.mips.addv.w(<4 x i32> %2, <4 x i32> %2)
947 ; LITENDIAN: addv.d [[R2:\$w[0-9]+]], [[R1]], [[R1]]
948 ; LITENDIAN: addv.w [[R3:\$w[0-9]+]], [[R2]], [[R2]]
954 ; BIGENDIAN: addv.d [[R2:\$w[0-9]+]], [[R1]], [[R1]]
956 ; BIGENDIAN: addv.w [[R4:\$w[0-9]+]], [[R3]], [[R3]]
963 %1 = tail call <2 x i64> @llvm.mips.addv.d(<2 x i64> %0, <2 x i64> %0)
972 ; LITENDIAN: addv.d [[R2:\$w[0-9]+]], [[R1]], [[R1]]
979 ; BIGENDIAN: addv.d [[R2:\$w[0-9]+]], [[R1]], [[R1]]
988 %1 = tail call <2 x i64> @llvm.mips.addv.d(<2 x i64> %0, <2 x i64> %0)
990 %3 = tail call <2 x i64> @llvm.mips.addv.d(<2 x i64> %2, <2 x i64> %2)
997 ; LITENDIAN: addv.d [[R2:\$w[0-9]+]], [[R1]], [[R1]]
998 ; LITENDIAN: addv.d [[R3:\$w[0-9]+]], [[R2]], [[R2]]
1004 ; BIGENDIAN: addv.d [[R2:\$w[0-9]+]], [[R1]], [[R1]]
1005 ; BIGENDIAN: addv.d [[R3:\$w[0-9]+]], [[R2]], [[R2]]
1012 %1 = tail call <2 x i64> @llvm.mips.addv.d(<2 x i64> %0, <2 x i64> %0)
1021 ; LITENDIAN: addv.d [[R2:\$w[0-9]+]], [[R1]], [[R1]]
1028 ; BIGENDIAN: addv.d [[R2:\$w[0-9]+]], [[R1]], [[R1]]
1038 %3 = tail call <16 x i8> @llvm.mips.addv.b(<16 x i8> %2, <16 x i8> %2)
1046 ; LITENDIAN: addv.b [[R3:\$w[0-9]+]], [[R2]], [[R2]]
1055 ; BIGENDIAN: addv.b [[R4:\$w[0-9]+]], [[R3]], [[R3]]
1064 %3 = tail call <8 x i16> @llvm.mips.addv.h(<8 x i16> %2, <8 x i16> %2)
1072 ; LITENDIAN: addv.h [[R3:\$w[0-9]+]], [[R2]], [[R2]]
1080 ; BIGENDIAN: addv.h [[R4:\$w[0-9]+]], [[R3]], [[R3]]
1112 %3 = tail call <4 x i32> @llvm.mips.addv.w(<4 x i32> %2, <4 x i32> %2)
1120 ; LITENDIAN: addv.w [[R3:\$w[0-9]+]], [[R2]], [[R2]]
1128 ; BIGENDIAN: addv.w [[R4:\$w[0-9]+]], [[R3]], [[R3]]
1162 %3 = tail call <2 x i64> @llvm.mips.addv.d(<2 x i64> %2, <2 x i64> %2)
1170 ; LITENDIAN: addv.d [[R3:\$w[0-9]+]], [[R2]], [[R2]]
1177 ; BIGENDIAN: addv.d [[R3:\$w[0-9]+]], [[R2]], [[R2]]
1205 declare <16 x i8> @llvm.mips.addv.b(<16 x i8>, <16 x i8>) nounwind
1206 declare <8 x i16> @llvm.mips.addv.h(<8 x i16>, <8 x i16>) nounwind
1207 declare <4 x i32> @llvm.mips.addv.w(<4 x i32>, <4 x i32>) nounwind
1208 declare <2 x i64> @llvm.mips.addv.d(<2 x i64>, <2 x i64>) nounwind