Lines Matching refs:r1
15 ANDS r0, r2, r1 // Must be wide - 3 distinct registers
16 ANDS r2, r2, r1 // Should choose narrow
17 ANDS r2, r1, r2 // Should choose narrow - commutative
18 ANDS.W r0, r0, r1 // Explicitly wide
19 ANDS.W r3, r1, r3
20 AND r0, r1, r0 // Must use wide encoding as not flag-setting
21 ANDS r7, r7, r1 // Should use narrow
22 ANDS r7, r1, r7 // Commutative
23 ANDS r8, r1, r8 // high registers so must use wide encoding
24 ANDS r8, r8, r1
26 ANDS r1, r1, r8
27 ANDS r2, r2, r1, lsl #1 // Must use wide - shifted register
28 ANDS r0, r1, r0, lsr #1
29 // CHECK: ands.w r0, r2, r1 @ encoding: [0x12,0xea,0x01,0x00]
30 // CHECK: ands r2, r1 @ encoding: [0x0a,0x40]
31 // CHECK: ands r2, r1 @ encoding: [0x0a,0x40]
32 // CHECK: ands.w r0, r0, r1 @ encoding: [0x10,0xea,0x01,0x00]
33 // CHECK: ands.w r3, r1, r3 @ encoding: [0x11,0xea,0x03,0x03]
34 // CHECK: and.w r0, r1, r0 @ encoding: [0x01,0xea,0x00,0x00]
35 // CHECK: ands r7, r1 @ encoding: [0x0f,0x40]
36 // CHECK: ands r7, r1 @ encoding: [0x0f,0x40]
37 // CHECK: ands.w r8, r1, r8 @ encoding: [0x11,0xea,0x08,0x08]
38 // CHECK: ands.w r8, r8, r1 @ encoding: [0x18,0xea,0x01,0x08]
40 // CHECK: ands.w r1, r1, r8 @ encoding: [0x11,0xea,0x08,0x01]
41 // CHECK: ands.w r2, r2, r1, lsl #1 @ encoding: [0x12,0xea,0x41,0x02]
42 // CHECK: ands.w r0, r1, r0, lsr #1 @ encoding: [0x11,0xea,0x50,0x00]
45 ANDEQ r0, r2, r1 // Must be wide - 3 distinct registers
47 ANDEQ r3, r3, r1 // Should choose narrow
49 ANDEQ r3, r1, r3 // Should choose narrow - commutative
51 ANDEQ.W r0, r0, r1 // Explicitly wide
53 ANDEQ.W r2, r1, r2
55 ANDSEQ r0, r1, r0 // Must use wide encoding as flag-setting
57 ANDEQ r7, r7, r1 // Should use narrow
59 ANDEQ r7, r1, r7 // Commutative
61 ANDEQ r8, r1, r8 // high registers so must use wide encoding
63 ANDEQ r8, r8, r1
69 ANDEQ r0, r0, r1, lsl #1 // Must use wide - shifted register
71 ANDEQ r5, r1, r5, lsr #1
73 // CHECK: andeq.w r0, r2, r1 @ encoding: [0x02,0xea,0x01,0x00]
75 // CHECK: andeq r3, r1 @ encoding: [0x0b,0x40]
77 // CHECK: andeq r3, r1 @ encoding: [0x0b,0x40]
79 // CHECK: andeq.w r0, r0, r1 @ encoding: [0x00,0xea,0x01,0x00]
81 // CHECK: andeq.w r2, r1, r2 @ encoding: [0x01,0xea,0x02,0x02]
83 // CHECK: andseq.w r0, r1, r0 @ encoding: [0x11,0xea,0x00,0x00]
85 // CHECK: andeq r7, r1 @ encoding: [0x0f,0x40]
87 // CHECK: andeq r7, r1 @ encoding: [0x0f,0x40]
89 // CHECK: andeq.w r8, r1, r8 @ encoding: [0x01,0xea,0x08,0x08]
91 // CHECK: andeq.w r8, r8, r1 @ encoding: [0x08,0xea,0x01,0x08]
97 // CHECK: andeq.w r0, r0, r1, lsl #1 @ encoding: [0x00,0xea,0x41,0x00]
99 // CHECK: andeq.w r5, r1, r5, lsr #1 @ encoding: [0x01,0xea,0x55,0x05]
102 EORS r0, r2, r1 // Must be wide - 3 distinct registers
103 EORS r5, r5, r1 // Should choose narrow
104 EORS r5, r1, r5 // Should choose narrow - commutative
105 EORS.W r0, r0, r1 // Explicitly wide
106 EORS.W r2, r1, r2
107 EOR r1, r1, r1 // Must use wide encoding as not flag-setting
108 EORS r7, r7, r1 // Should use narrow
109 EORS r7, r1, r7 // Commutative
110 EORS r8, r1, r8 // high registers so must use wide encoding
111 EORS r8, r8, r1
114 EORS r2, r2, r1, lsl #1 // Must use wide - shifted register
115 EORS r0, r1, r0, lsr #1
116 // CHECK: eors.w r0, r2, r1 @ encoding: [0x92,0xea,0x01,0x00]
117 // CHECK: eors r5, r1 @ encoding: [0x4d,0x40]
118 // CHECK: eors r5, r1 @ encoding: [0x4d,0x40]
119 // CHECK: eors.w r0, r0, r1 @ encoding: [0x90,0xea,0x01,0x00]
120 // CHECK: eors.w r2, r1, r2 @ encoding: [0x91,0xea,0x02,0x02]
121 // CHECK: eor.w r1, r1, r1 @ encoding: [0x81,0xea,0x01,0x01]
122 // CHECK: eors r7, r1 @ encoding: [0x4f,0x40]
123 // CHECK: eors r7, r1 @ encoding: [0x4f,0x40]
124 // CHECK: eors.w r8, r1, r8 @ encoding: [0x91,0xea,0x08,0x08]
125 // CHECK: eors.w r8, r8, r1 @ encoding: [0x98,0xea,0x01,0x08]
128 // CHECK: eors.w r2, r2, r1, lsl #1 @ encoding: [0x92,0xea,0x41,0x02]
129 // CHECK: eors.w r0, r1, r0, lsr #1 @ encoding: [0x91,0xea,0x50,0x00]
132 EOREQ r3, r2, r1 // Must be wide - 3 distinct registers
134 EOREQ r0, r0, r1 // Should choose narrow
136 EOREQ r2, r1, r2 // Should choose narrow - commutative
138 EOREQ.W r3, r3, r1 // Explicitly wide
140 EOREQ.W r0, r1, r0
142 EORSEQ r1, r1, r1 // Must use wide encoding as flag-setting
144 EOREQ r7, r7, r1 // Should use narrow
146 EOREQ r7, r1, r7 // Commutative
148 EOREQ r8, r1, r8 // high registers so must use wide encoding
150 EOREQ r8, r8, r1
156 EOREQ r4, r4, r1, lsl #1 // Must use wide - shifted register
158 EOREQ r0, r1, r0, lsr #1
160 // CHECK: eoreq.w r3, r2, r1 @ encoding: [0x82,0xea,0x01,0x03]
162 // CHECK: eoreq r0, r1 @ encoding: [0x48,0x40]
164 // CHECK: eoreq r2, r1 @ encoding: [0x4a,0x40]
166 // CHECK: eoreq.w r3, r3, r1 @ encoding: [0x83,0xea,0x01,0x03]
168 // CHECK: eoreq.w r0, r1, r0 @ encoding: [0x81,0xea,0x00,0x00]
170 // CHECK: eorseq.w r1, r1, r1 @ encoding: [0x91,0xea,0x01,0x01]
172 // CHECK: eoreq r7, r1 @ encoding: [0x4f,0x40]
174 // CHECK: eoreq r7, r1 @ encoding: [0x4f,0x40]
176 // CHECK: eoreq.w r8, r1, r8 @ encoding: [0x81,0xea,0x08,0x08]
178 // CHECK: eoreq.w r8, r8, r1 @ encoding: [0x88,0xea,0x01,0x08]
184 // CHECK: eoreq.w r4, r4, r1, lsl #1 @ encoding: [0x84,0xea,0x41,0x04]
186 // CHECK: eoreq.w r0, r1, r0, lsr #1 @ encoding: [0x81,0xea,0x50,0x00]
189 LSLS r0, r2, r1 // Must be wide - 3 distinct registers
190 LSLS r2, r2, r1 // Should choose narrow
191 LSLS r2, r1, r2 // Should choose wide - not commutative
192 LSLS.W r0, r0, r1 // Explicitly wide
193 LSLS.W r4, r1, r4
194 LSL r4, r1, r4 // Must use wide encoding as not flag-setting
195 LSLS r7, r7, r1 // Should use narrow
196 LSLS r8, r1, r8 // high registers so must use wide encoding
197 LSLS r8, r8, r1
200 // CHECK: lsls.w r0, r2, r1 @ encoding: [0x12,0xfa,0x01,0xf0]
201 // CHECK: lsls r2, r1 @ encoding: [0x8a,0x40]
202 // CHECK: lsls.w r2, r1, r2 @ encoding: [0x11,0xfa,0x02,0xf2]
203 // CHECK: lsls.w r0, r0, r1 @ encoding: [0x10,0xfa,0x01,0xf0]
204 // CHECK: lsls.w r4, r1, r4 @ encoding: [0x11,0xfa,0x04,0xf4]
205 // CHECK: lsl.w r4, r1, r4 @ encoding: [0x01,0xfa,0x04,0xf4]
206 // CHECK: lsls r7, r1 @ encoding: [0x8f,0x40]
207 // CHECK: lsls.w r8, r1, r8 @ encoding: [0x11,0xfa,0x08,0xf8]
208 // CHECK: lsls.w r8, r8, r1 @ encoding: [0x18,0xfa,0x01,0xf8]
213 LSLEQ r0, r2, r1 // Must be wide - 3 distinct registers
215 LSLEQ r2, r2, r1 // Should choose narrow
217 LSLEQ r2, r1, r2 // Should choose wide - not commutative
219 LSLEQ.W r0, r0, r1 // Explicitly wide
221 LSLEQ.W r3, r1, r3
223 LSLSEQ r4, r1, r4 // Must use wide encoding as flag-setting
225 LSLEQ r7, r7, r1 // Should use narrow
227 LSLEQ r8, r1, r8 // high registers so must use wide encoding
229 LSLEQ r8, r8, r1
235 // CHECK: lsleq.w r0, r2, r1 @ encoding: [0x02,0xfa,0x01,0xf0]
237 // CHECK: lsleq r2, r1 @ encoding: [0x8a,0x40]
239 // CHECK: lsleq.w r2, r1, r2 @ encoding: [0x01,0xfa,0x02,0xf2]
241 // CHECK: lsleq.w r0, r0, r1 @ encoding: [0x00,0xfa,0x01,0xf0]
243 // CHECK: lsleq.w r3, r1, r3 @ encoding: [0x01,0xfa,0x03,0xf3]
245 // CHECK: lslseq.w r4, r1, r4 @ encoding: [0x11,0xfa,0x04,0xf4]
247 // CHECK: lsleq r7, r1 @ encoding: [0x8f,0x40]
249 // CHECK: lsleq.w r8, r1, r8 @ encoding: [0x01,0xfa,0x08,0xf8]
251 // CHECK: lsleq.w r8, r8, r1 @ encoding: [0x08,0xfa,0x01,0xf8]
258 LSRS r6, r2, r1 // Must be wide - 3 distinct registers
259 LSRS r2, r2, r1 // Should choose narrow
260 LSRS r2, r1, r2 // Should choose wide - not commutative
261 LSRS.W r2, r2, r1 // Explicitly wide
262 LSRS.W r3, r1, r3
263 LSR r4, r1, r4 // Must use wide encoding as not flag-setting
264 LSRS r7, r7, r1 // Should use narrow
265 LSRS r8, r1, r8 // high registers so must use wide encoding
266 LSRS r8, r8, r1
269 // CHECK: lsrs.w r6, r2, r1 @ encoding: [0x32,0xfa,0x01,0xf6]
270 // CHECK: lsrs r2, r1 @ encoding: [0xca,0x40]
271 // CHECK: lsrs.w r2, r1, r2 @ encoding: [0x31,0xfa,0x02,0xf2]
272 // CHECK: lsrs.w r2, r2, r1 @ encoding: [0x32,0xfa,0x01,0xf2]
273 // CHECK: lsrs.w r3, r1, r3 @ encoding: [0x31,0xfa,0x03,0xf3]
274 // CHECK: lsr.w r4, r1, r4 @ encoding: [0x21,0xfa,0x04,0xf4]
275 // CHECK: lsrs r7, r1 @ encoding: [0xcf,0x40]
276 // CHECK: lsrs.w r8, r1, r8 @ encoding: [0x31,0xfa,0x08,0xf8]
277 // CHECK: lsrs.w r8, r8, r1 @ encoding: [0x38,0xfa,0x01,0xf8]
282 LSREQ r6, r2, r1 // Must be wide - 3 distinct registers
284 LSREQ r7, r7, r1 // Should choose narrow
286 LSREQ r7, r1, r7 // Should choose wide - not commutative
288 LSREQ.W r7, r7, r1 // Explicitly wide
290 LSREQ.W r2, r1, r2
292 LSRSEQ r0, r1, r0 // Must use wide encoding as flag-setting
294 LSREQ r7, r7, r1 // Should use narrow
296 LSREQ r8, r1, r8 // high registers so must use wide encoding
298 LSREQ r8, r8, r1
300 LSREQ r1, r8, r1
304 // CHECK: lsreq.w r6, r2, r1 @ encoding: [0x22,0xfa,0x01,0xf6]
306 // CHECK: lsreq r7, r1 @ encoding: [0xcf,0x40]
308 // CHECK: lsreq.w r7, r1, r7 @ encoding: [0x21,0xfa,0x07,0xf7]
310 // CHECK: lsreq.w r7, r7, r1 @ encoding: [0x27,0xfa,0x01,0xf7]
312 // CHECK: lsreq.w r2, r1, r2 @ encoding: [0x21,0xfa,0x02,0xf2]
314 // CHECK: lsrseq.w r0, r1, r0 @ encoding: [0x31,0xfa,0x00,0xf0]
316 // CHECK: lsreq r7, r1 @ encoding: [0xcf,0x40]
318 // CHECK: lsreq.w r8, r1, r8 @ encoding: [0x21,0xfa,0x08,0xf8]
320 // CHECK: lsreq.w r8, r8, r1 @ encoding: [0x28,0xfa,0x01,0xf8]
322 // CHECK: lsreq.w r1, r8, r1 @ encoding: [0x28,0xfa,0x01,0xf1]
328 ASRS r0, r0, r1 // Should choose narrow
329 ASRS r0, r1, r0 // Should choose wide - not commutative
330 ASRS.W r3, r3, r1 // Explicitly wide
331 ASRS.W r1, r1, r1
332 ASR r0, r1, r0 // Must use wide encoding as not flag-setting
333 ASRS r7, r7, r1 // Should use narrow
334 ASRS r8, r1, r8 // high registers so must use wide encoding
335 ASRS r8, r8, r1
339 // CHECK: asrs r0, r1 @ encoding: [0x08,0x41]
340 // CHECK: asrs.w r0, r1, r0 @ encoding: [0x51,0xfa,0x00,0xf0]
341 // CHECK: asrs.w r3, r3, r1 @ encoding: [0x53,0xfa,0x01,0xf3]
342 // CHECK: asrs.w r1, r1, r1 @ encoding: [0x51,0xfa,0x01,0xf1]
343 // CHECK: asr.w r0, r1, r0 @ encoding: [0x41,0xfa,0x00,0xf0]
344 // CHECK: asrs r7, r1 @ encoding: [0x0f,0x41]
345 // CHECK: asrs.w r8, r1, r8 @ encoding: [0x51,0xfa,0x08,0xf8]
346 // CHECK: asrs.w r8, r8, r1 @ encoding: [0x58,0xfa,0x01,0xf8]
351 ASREQ r0, r2, r1 // Must be wide - 3 distinct registers
353 ASREQ r2, r2, r1 // Should choose narrow
355 ASREQ r1, r2, r1 // Should choose wide - not commutative
357 ASREQ.W r4, r4, r1 // Explicitly wide
359 ASREQ.W r6, r1, r6
361 ASRSEQ r3, r1, r3 // Must use wide encoding as flag-setting
363 ASREQ r7, r7, r1 // Should use narrow
365 ASREQ r8, r1, r8 // high registers so must use wide encoding
367 ASREQ r8, r8, r1
369 ASREQ r1, r8, r1
373 // CHECK: asreq.w r0, r2, r1 @ encoding: [0x42,0xfa,0x01,0xf0]
375 // CHECK: asreq r2, r1 @ encoding: [0x0a,0x41]
377 // CHECK: asreq.w r1, r2, r1 @ encoding: [0x42,0xfa,0x01,0xf1]
379 // CHECK: asreq.w r4, r4, r1 @ encoding: [0x44,0xfa,0x01,0xf4]
381 // CHECK: asreq.w r6, r1, r6 @ encoding: [0x41,0xfa,0x06,0xf6]
383 // CHECK: asrseq.w r3, r1, r3 @ encoding: [0x51,0xfa,0x03,0xf3]
385 // CHECK: asreq r7, r1 @ encoding: [0x0f,0x41]
387 // CHECK: asreq.w r8, r1, r8 @ encoding: [0x41,0xfa,0x08,0xf8]
389 // CHECK: asreq.w r8, r8, r1 @ encoding: [0x48,0xfa,0x01,0xf8]
391 // CHECK: asreq.w r1, r8, r1 @ encoding: [0x48,0xfa,0x01,0xf1]
396 ADCS r5, r2, r1 // Must be wide - 3 distinct registers
397 ADCS r5, r5, r1 // Should choose narrow
398 ADCS r3, r1, r3 // Should choose narrow - commutative
399 ADCS.W r2, r2, r1 // Explicitly wide
400 ADCS.W r3, r1, r3
401 ADC r0, r1, r0 // Must use wide encoding as not flag-setting
402 ADCS r7, r7, r1 // Should use narrow
403 ADCS r7, r1, r7 // Commutative
404 ADCS r8, r1, r8 // high registers so must use wide encoding
405 ADCS r8, r8, r1
408 ADCS r3, r3, r1, lsl #1 // Must use wide - shifted register
409 ADCS r4, r1, r4, lsr #1
410 // CHECK: adcs.w r5, r2, r1 @ encoding: [0x52,0xeb,0x01,0x05]
411 // CHECK: adcs r5, r1 @ encoding: [0x4d,0x41]
412 // CHECK: adcs r3, r1 @ encoding: [0x4b,0x41]
413 // CHECK: adcs.w r2, r2, r1 @ encoding: [0x52,0xeb,0x01,0x02]
414 // CHECK: adcs.w r3, r1, r3 @ encoding: [0x51,0xeb,0x03,0x03]
415 // CHECK: adc.w r0, r1, r0 @ encoding: [0x41,0xeb,0x00,0x00]
416 // CHECK: adcs r7, r1 @ encoding: [0x4f,0x41]
417 // CHECK: adcs r7, r1 @ encoding: [0x4f,0x41]
418 // CHECK: adcs.w r8, r1, r8 @ encoding: [0x51,0xeb,0x08,0x08]
419 // CHECK: adcs.w r8, r8, r1 @ encoding: [0x58,0xeb,0x01,0x08]
422 // CHECK: adcs.w r3, r3, r1, lsl #1 @ encoding: [0x53,0xeb,0x41,0x03]
423 // CHECK: adcs.w r4, r1, r4, lsr #1 @ encoding: [0x51,0xeb,0x54,0x04]
426 ADCEQ r1, r2, r3 // Must be wide - 3 distinct registers
428 ADCEQ r1, r1, r1 // Should choose narrow
430 ADCEQ r3, r1, r3 // Should choose narrow - commutative
432 ADCEQ.W r3, r3, r1 // Explicitly wide
434 ADCEQ.W r0, r1, r0
436 ADCSEQ r3, r1, r3 // Must use wide encoding as flag-setting
438 ADCEQ r7, r7, r1 // Should use narrow
440 ADCEQ r7, r1, r7 // Commutative
442 ADCEQ r8, r1, r8 // high registers so must use wide encoding
444 ADCEQ r8, r8, r1
448 ADCEQ r1, r1, r8
450 ADCEQ r2, r2, r1, lsl #1 // Must use wide - shifted register
452 ADCEQ r1, r1, r1, lsr #1
454 // CHECK: adceq.w r1, r2, r3 @ encoding: [0x42,0xeb,0x03,0x01]
456 // CHECK: adceq r1, r1 @ encoding: [0x49,0x41]
458 // CHECK: adceq r3, r1 @ encoding: [0x4b,0x41]
460 // CHECK: adceq.w r3, r3, r1 @ encoding: [0x43,0xeb,0x01,0x03]
462 // CHECK: adceq.w r0, r1, r0 @ encoding: [0x41,0xeb,0x00,0x00]
464 // CHECK: adcseq.w r3, r1, r3 @ encoding: [0x51,0xeb,0x03,0x03]
466 // CHECK: adceq r7, r1 @ encoding: [0x4f,0x41]
468 // CHECK: adceq r7, r1 @ encoding: [0x4f,0x41]
470 // CHECK: adceq.w r8, r1, r8 @ encoding: [0x41,0xeb,0x08,0x08]
472 // CHECK: adceq.w r8, r8, r1 @ encoding: [0x48,0xeb,0x01,0x08]
476 // CHECK: adceq.w r1, r1, r8 @ encoding: [0x41,0xeb,0x08,0x01]
478 // CHECK: adceq.w r2, r2, r1, lsl #1 @ encoding: [0x42,0xeb,0x41,0x02]
480 // CHECK: adceq.w r1, r1, r1, lsr #1 @ encoding: [0x41,0xeb,0x51,0x01]
483 SBCS r3, r2, r1 // Must be wide - 3 distinct registers
484 SBCS r4, r4, r1 // Should choose narrow
485 SBCS r1, r4, r1 // Should choose wide - not commutative
486 SBCS.W r4, r4, r1 // Explicitly wide
487 SBCS.W r2, r1, r2
488 SBC r0, r1, r0 // Must use wide encoding as not flag-setting
489 SBCS r7, r7, r1 // Should use narrow
490 SBCS r8, r1, r8 // high registers so must use wide encoding
491 SBCS r8, r8, r1
494 SBCS r2, r2, r1, lsl #1 // Must use wide - shifted register
495 SBCS r5, r1, r5, lsr #1
496 // CHECK: sbcs.w r3, r2, r1 @ encoding: [0x72,0xeb,0x01,0x03]
497 // CHECK: sbcs r4, r1 @ encoding: [0x8c,0x41]
498 // CHECK: sbcs.w r1, r4, r1 @ encoding: [0x74,0xeb,0x01,0x01]
499 // CHECK: sbcs.w r4, r4, r1 @ encoding: [0x74,0xeb,0x01,0x04]
500 // CHECK: sbcs.w r2, r1, r2 @ encoding: [0x71,0xeb,0x02,0x02]
501 // CHECK: sbc.w r0, r1, r0 @ encoding: [0x61,0xeb,0x00,0x00]
502 // CHECK: sbcs r7, r1 @ encoding: [0x8f,0x41]
503 // CHECK: sbcs.w r8, r1, r8 @ encoding: [0x71,0xeb,0x08,0x08]
504 // CHECK: sbcs.w r8, r8, r1 @ encoding: [0x78,0xeb,0x01,0x08]
507 // CHECK: sbcs.w r2, r2, r1, lsl #1 @ encoding: [0x72,0xeb,0x41,0x02]
508 // CHECK: sbcs.w r5, r1, r5, lsr #1 @ encoding: [0x71,0xeb,0x55,0x05]
511 SBCEQ r5, r2, r1 // Must be wide - 3 distinct registers
513 SBCEQ r5, r5, r1 // Should choose narrow
515 SBCEQ r1, r5, r1 // Should choose narrow
517 SBCEQ.W r5, r5, r1 // Explicitly wide
519 SBCEQ.W r0, r1, r0
521 SBCSEQ r2, r1, r2 // Must use wide encoding as flag-setting
523 SBCEQ r7, r7, r1 // Should use narrow
525 SBCEQ r8, r1, r8 // high registers so must use wide encoding
527 SBCEQ r8, r8, r1
533 SBCEQ r2, r2, r1, lsl #1 // Must use wide - shifted register
535 SBCEQ r5, r1, r5, lsr #1
537 // CHECK: sbceq.w r5, r2, r1 @ encoding: [0x62,0xeb,0x01,0x05]
539 // CHECK: sbceq r5, r1 @ encoding: [0x8d,0x41]
541 // CHECK: sbceq.w r1, r5, r1 @ encoding: [0x65,0xeb,0x01,0x01]
543 // CHECK: sbceq.w r5, r5, r1 @ encoding: [0x65,0xeb,0x01,0x05]
545 // CHECK: sbceq.w r0, r1, r0 @ encoding: [0x61,0xeb,0x00,0x00]
547 // CHECK: sbcseq.w r2, r1, r2 @ encoding: [0x71,0xeb,0x02,0x02]
549 // CHECK: sbceq r7, r1 @ encoding: [0x8f,0x41]
551 // CHECK: sbceq.w r8, r1, r8 @ encoding: [0x61,0xeb,0x08,0x08]
553 // CHECK: sbceq.w r8, r8, r1 @ encoding: [0x68,0xeb,0x01,0x08]
559 // CHECK: sbceq.w r2, r2, r1, lsl #1 @ encoding: [0x62,0xeb,0x41,0x02]
561 // CHECK: sbceq.w r5, r1, r5, lsr #1 @ encoding: [0x61,0xeb,0x55,0x05]
564 RORS r3, r2, r1 // Must be wide - 3 distinct registers
565 RORS r0, r0, r1 // Should choose narrow
566 RORS r1, r0, r1 // Should choose wide - not commutative
567 RORS.W r2, r2, r1 // Explicitly wide
568 RORS.W r2, r1, r2
569 ROR r5, r1, r5 // Must use wide encoding as not flag-setting
570 RORS r7, r7, r1 // Should use narrow
571 RORS r8, r1, r8 // high registers so must use wide encoding
572 RORS r8, r8, r1
575 // CHECK: rors.w r3, r2, r1 @ encoding: [0x72,0xfa,0x01,0xf3]
576 // CHECK: rors r0, r1 @ encoding: [0xc8,0x41]
577 // CHECK: rors.w r1, r0, r1 @ encoding: [0x70,0xfa,0x01,0xf1]
578 // CHECK: rors.w r2, r2, r1 @ encoding: [0x72,0xfa,0x01,0xf2]
579 // CHECK: rors.w r2, r1, r2 @ encoding: [0x71,0xfa,0x02,0xf2]
580 // CHECK: ror.w r5, r1, r5 @ encoding: [0x61,0xfa,0x05,0xf5]
581 // CHECK: rors r7, r1 @ encoding: [0xcf,0x41]
582 // CHECK: rors.w r8, r1, r8 @ encoding: [0x71,0xfa,0x08,0xf8]
583 // CHECK: rors.w r8, r8, r1 @ encoding: [0x78,0xfa,0x01,0xf8]
588 ROREQ r4, r2, r1 // Must be wide - 3 distinct registers
590 ROREQ r4, r4, r1 // Should choose narrow
592 ROREQ r1, r4, r1 // Should choose wide - not commutative
594 ROREQ.W r4, r4, r1 // Explicitly wide
596 ROREQ.W r0, r1, r0
598 RORSEQ r0, r1, r0 // Must use wide encoding as flag-setting
600 ROREQ r7, r7, r1 // Should use narrow
602 ROREQ r8, r1, r8 // high registers so must use wide encoding
604 ROREQ r8, r8, r1
608 ROREQ r1, r1, r8
610 // CHECK: roreq.w r4, r2, r1 @ encoding: [0x62,0xfa,0x01,0xf4]
612 // CHECK: roreq r4, r1 @ encoding: [0xcc,0x41]
614 // CHECK: roreq.w r1, r4, r1 @ encoding: [0x64,0xfa,0x01,0xf1]
616 // CHECK: roreq.w r4, r4, r1 @ encoding: [0x64,0xfa,0x01,0xf4]
618 // CHECK: roreq.w r0, r1, r0 @ encoding: [0x61,0xfa,0x00,0xf0]
620 // CHECK: rorseq.w r0, r1, r0 @ encoding: [0x71,0xfa,0x00,0xf0]
622 // CHECK: roreq r7, r1 @ encoding: [0xcf,0x41]
624 // CHECK: roreq.w r8, r1, r8 @ encoding: [0x61,0xfa,0x08,0xf8]
626 // CHECK: roreq.w r8, r8, r1 @ encoding: [0x68,0xfa,0x01,0xf8]
630 // CHECK: roreq.w r1, r1, r8 @ encoding: [0x61,0xfa,0x08,0xf1]
638 ORRS r7, r2, r1 // Must be wide - 3 distinct registers
639 ORRS r2, r2, r1 // Should choose narrow
640 ORRS r3, r1, r3 // Should choose narrow - commutative
641 ORRS.W r4, r4, r1 // Explicitly wide
642 ORRS.W r5, r1, r5
643 ORR r2, r1, r2 // Must use wide encoding as not flag-setting
644 ORRS r7, r7, r1 // Should use narrow
645 ORRS r7, r1, r7 // Commutative
646 ORRS r8, r1, r8 // high registers so must use wide encoding
647 ORRS r8, r8, r1
648 ORRS r1, r8, r1
650 ORRS r1, r1, r1, lsl #1 // Must use wide - shifted register
651 ORRS r0, r1, r0, lsr #1
652 // CHECK: orrs.w r7, r2, r1 @ encoding: [0x52,0xea,0x01,0x07]
653 // CHECK: orrs r2, r1 @ encoding: [0x0a,0x43]
654 // CHECK: orrs r3, r1 @ encoding: [0x0b,0x43]
655 // CHECK: orrs.w r4, r4, r1 @ encoding: [0x54,0xea,0x01,0x04]
656 // CHECK: orrs.w r5, r1, r5 @ encoding: [0x51,0xea,0x05,0x05]
657 // CHECK: orr.w r2, r1, r2 @ encoding: [0x41,0xea,0x02,0x02]
658 // CHECK: orrs r7, r1 @ encoding: [0x0f,0x43]
659 // CHECK: orrs r7, r1 @ encoding: [0x0f,0x43]
660 // CHECK: orrs.w r8, r1, r8 @ encoding: [0x51,0xea,0x08,0x08]
661 // CHECK: orrs.w r8, r8, r1 @ encoding: [0x58,0xea,0x01,0x08]
662 // CHECK: orrs.w r1, r8, r1 @ encoding: [0x58,0xea,0x01,0x01]
664 // CHECK: orrs.w r1, r1, r1, lsl #1 @ encoding: [0x51,0xea,0x41,0x01]
665 // CHECK: orrs.w r0, r1, r0, lsr #1 @ encoding: [0x51,0xea,0x50,0x00]
668 ORREQ r0, r2, r1 // Must be wide - 3 distinct registers
670 ORREQ r5, r5, r1 // Should choose narrow
672 ORREQ r5, r1, r5 // Should choose narrow - commutative
674 ORREQ.W r2, r2, r1 // Explicitly wide
676 ORREQ.W r3, r1, r3
678 ORRSEQ r4, r1, r4 // Must use wide encoding as flag-setting
680 ORREQ r7, r7, r1 // Should use narrow
682 ORREQ r7, r1, r7 // Commutative
684 ORREQ r8, r1, r8 // high registers so must use wide encoding
686 ORREQ r8, r8, r1
692 ORREQ r2, r2, r1, lsl #1 // Must use wide - shifted register
694 ORREQ r2, r1, r2, lsr #1
696 // CHECK: orreq.w r0, r2, r1 @ encoding: [0x42,0xea,0x01,0x00]
698 // CHECK: orreq r5, r1 @ encoding: [0x0d,0x43]
700 // CHECK: orreq r5, r1 @ encoding: [0x0d,0x43]
702 // CHECK: orreq.w r2, r2, r1 @ encoding: [0x42,0xea,0x01,0x02]
704 // CHECK: orreq.w r3, r1, r3 @ encoding: [0x41,0xea,0x03,0x03]
706 // CHECK: orrseq.w r4, r1, r4 @ encoding: [0x51,0xea,0x04,0x04]
708 // CHECK: orreq r7, r1 @ encoding: [0x0f,0x43]
710 // CHECK: orreq r7, r1 @ encoding: [0x0f,0x43]
712 // CHECK: orreq.w r8, r1, r8 @ encoding: [0x41,0xea,0x08,0x08]
714 // CHECK: orreq.w r8, r8, r1 @ encoding: [0x48,0xea,0x01,0x08]
720 // CHECK: orreq.w r2, r2, r1, lsl #1 @ encoding: [0x42,0xea,0x41,0x02]
722 // CHECK: orreq.w r2, r1, r2, lsr #1 @ encoding: [0x41,0xea,0x52,0x02]
727 BICS r3, r2, r1 // Must be wide - 3 distinct registers
728 BICS r2, r2, r1 // Should choose narrow
729 BICS r1, r2, r1 // Should choose wide - not commutative
730 BICS.W r2, r2, r1 // Explicitly wide
731 BICS.W r0, r1, r0
732 BIC r0, r1, r0 // Must use wide encoding as not flag-setting
733 BICS r7, r7, r1 // Should use narrow
734 BICS r8, r1, r8 // high registers so must use wide encoding
735 BICS r8, r8, r1
738 BICS r3, r3, r1, lsl #1 // Must use wide - shifted register
739 BICS r4, r1, r4, lsr #1
740 // CHECK: bics.w r3, r2, r1 @ encoding: [0x32,0xea,0x01,0x03]
741 // CHECK: bics r2, r1 @ encoding: [0x8a,0x43]
742 // CHECK: bics.w r1, r2, r1 @ encoding: [0x32,0xea,0x01,0x01]
743 // CHECK: bics.w r2, r2, r1 @ encoding: [0x32,0xea,0x01,0x02]
744 // CHECK: bics.w r0, r1, r0 @ encoding: [0x31,0xea,0x00,0x00]
745 // CHECK: bic.w r0, r1, r0 @ encoding: [0x21,0xea,0x00,0x00]
746 // CHECK: bics r7, r1 @ encoding: [0x8f,0x43]
747 // CHECK: bics.w r8, r1, r8 @ encoding: [0x31,0xea,0x08,0x08]
748 // CHECK: bics.w r8, r8, r1 @ encoding: [0x38,0xea,0x01,0x08]
751 // CHECK: bics.w r3, r3, r1, lsl #1 @ encoding: [0x33,0xea,0x41,0x03]
752 // CHECK: bics.w r4, r1, r4, lsr #1 @ encoding: [0x31,0xea,0x54,0x04]
755 BICEQ r0, r2, r1 // Must be wide - 3 distinct registers
757 BICEQ r5, r5, r1 // Should choose narrow
759 BICEQ r1, r5, r1 // Should choose wide - not commutative
761 BICEQ.W r4, r4, r1 // Explicitly wide
763 BICEQ.W r2, r1, r2
765 BICSEQ r5, r1, r5 // Must use wide encoding as flag-setting
767 BICEQ r7, r7, r1 // Should use narrow
769 BICEQ r8, r1, r8 // high registers so must use wide encoding
771 BICEQ r8, r8, r1
777 BICEQ r4, r4, r1, lsl #1 // Must use wide - shifted register
779 BICEQ r5, r1, r5, lsr #1
781 // CHECK: biceq.w r0, r2, r1 @ encoding: [0x22,0xea,0x01,0x00]
783 // CHECK: biceq r5, r1 @ encoding: [0x8d,0x43]
785 // CHECK: biceq.w r1, r5, r1 @ encoding: [0x25,0xea,0x01,0x01]
787 // CHECK: biceq.w r4, r4, r1 @ encoding: [0x24,0xea,0x01,0x04]
789 // CHECK: biceq.w r2, r1, r2 @ encoding: [0x21,0xea,0x02,0x02]
791 // CHECK: bicseq.w r5, r1, r5 @ encoding: [0x31,0xea,0x05,0x05]
793 // CHECK: biceq r7, r1 @ encoding: [0x8f,0x43]
795 // CHECK: biceq.w r8, r1, r8 @ encoding: [0x21,0xea,0x08,0x08]
797 // CHECK: biceq.w r8, r8, r1 @ encoding: [0x28,0xea,0x01,0x08]
803 // CHECK: biceq.w r4, r4, r1, lsl #1 @ encoding: [0x24,0xea,0x41,0x04]
805 // CHECK: biceq.w r5, r1, r5, lsr #1 @ encoding: [0x21,0xea,0x55,0x05]