404 void CodeGenSchedModels::expandRWSequence(unsigned RWIdx, IdxVec &RWSeq,  in expandRWSequence()  argument
406   const CodeGenSchedRW &SchedRW = getSchedRW(RWIdx, IsRead);  in expandRWSequence()
408     RWSeq.push_back(RWIdx);  in expandRWSequence()
424   unsigned RWIdx, IdxVec &RWSeq, bool IsRead,  in expandRWSeqForProc()  argument
427   const CodeGenSchedRW &SchedWrite = getSchedRW(RWIdx, IsRead);  in expandRWSeqForProc()
449     RWSeq.push_back(RWIdx);  in expandRWSeqForProc()
487   unsigned RWIdx = IsRead ? SchedReads.size() : SchedWrites.size();  in findOrInsertRW()  local
488   CodeGenSchedRW SchedRW(RWIdx, IsRead, Seq, genRWName(Seq, IsRead));  in findOrInsertRW()
493   return RWIdx;  in findOrInsertRW()
911   unsigned RWIdx;       // Index of this variant or sequence's matched type.  member
916     VarOrSeqDef(def), RWIdx(rwi), ProcIdx(pi), TransVecIdx(ti) {}  in TransVariant()
923   unsigned RWIdx;  member
926   PredCheck(bool r, unsigned w, Record *p): IsRead(r), RWIdx(w), Predicate(p) {}  in PredCheck()
983     const CodeGenSchedRW &SchedRW = SchedModels.getSchedRW(I->RWIdx, I->IsRead);  in mutuallyExclusive()
1151     Trans.PredTerm.push_back(PredCheck(IsRead, VInfo.RWIdx,PredDef));  in pushVariant()
1161   const CodeGenSchedRW &SchedRW = SchedModels.getSchedRW(VInfo.RWIdx, IsRead);  in pushVariant()
1557 void CodeGenSchedModels::collectRWResources(unsigned RWIdx, bool IsRead,  in collectRWResources()  argument
1559   const CodeGenSchedRW &SchedRW = getSchedRW(RWIdx, IsRead);  in collectRWResources()
1768       dbgs() << SchedModels.getSchedRW(PCI->RWIdx, PCI->IsRead).Name  in dump()