Lines Matching refs:WriteLatencies
40 std::vector<MCWriteLatencyEntry> WriteLatencies; member
48 WriteLatencies.resize(1); in SchedClassTables()
910 std::vector<MCWriteLatencyEntry> WriteLatencies; in GenSchedClassTables() local
976 WriteLatencies.push_back(WLEntry); in GenSchedClassTables()
1013 WriteLatencies.clear(); in GenSchedClassTables()
1036 SCDesc.NumWriteLatencyEntries = WriteLatencies.size(); in GenSchedClassTables()
1038 std::search(SchedTables.WriteLatencies.begin(), in GenSchedClassTables()
1039 SchedTables.WriteLatencies.end(), in GenSchedClassTables()
1040 WriteLatencies.begin(), WriteLatencies.end()); in GenSchedClassTables()
1041 if (WLPos != SchedTables.WriteLatencies.end()) { in GenSchedClassTables()
1042 unsigned idx = WLPos - SchedTables.WriteLatencies.begin(); in GenSchedClassTables()
1044 for (unsigned i = 0, e = WriteLatencies.size(); i < e; ++i) in GenSchedClassTables()
1051 SCDesc.WriteLatencyIdx = SchedTables.WriteLatencies.size(); in GenSchedClassTables()
1052 SchedTables.WriteLatencies.insert(SchedTables.WriteLatencies.end(), in GenSchedClassTables()
1053 WriteLatencies.begin(), in GenSchedClassTables()
1054 WriteLatencies.end()); in GenSchedClassTables()
1098 for (unsigned WLIdx = 1, WLEnd = SchedTables.WriteLatencies.size(); in EmitSchedClassTables()
1100 MCWriteLatencyEntry &WLEntry = SchedTables.WriteLatencies[WLIdx]; in EmitSchedClassTables()