Lines Matching refs:PRIME64_2

204 #define PRIME64_2 14029467366897019727ULL  macro
384 U64 v1 = seed + PRIME64_1 + PRIME64_2; in XXH64_endian_align()
385 U64 v2 = seed + PRIME64_2; in XXH64_endian_align()
391 v1 += XXH_get64bits(p) * PRIME64_2; in XXH64_endian_align()
395 v2 += XXH_get64bits(p) * PRIME64_2; in XXH64_endian_align()
399 v3 += XXH_get64bits(p) * PRIME64_2; in XXH64_endian_align()
403 v4 += XXH_get64bits(p) * PRIME64_2; in XXH64_endian_align()
412 v1 *= PRIME64_2; in XXH64_endian_align()
418 v2 *= PRIME64_2; in XXH64_endian_align()
424 v3 *= PRIME64_2; in XXH64_endian_align()
430 v4 *= PRIME64_2; in XXH64_endian_align()
446 k1 *= PRIME64_2; in XXH64_endian_align()
457 h64 = XXH_rotl64(h64, 23) * PRIME64_2 + PRIME64_3; in XXH64_endian_align()
469 h64 *= PRIME64_2; in XXH64_endian_align()
578 state->v1 = seed + PRIME64_1 + PRIME64_2; in XXH64_reset()
579 state->v2 = seed + PRIME64_2; in XXH64_reset()
766 state->v1 += XXH_readLE64(p64, endian) * PRIME64_2; in XXH64_update_endian()
770 state->v2 += XXH_readLE64(p64, endian) * PRIME64_2; in XXH64_update_endian()
774 state->v3 += XXH_readLE64(p64, endian) * PRIME64_2; in XXH64_update_endian()
778 state->v4 += XXH_readLE64(p64, endian) * PRIME64_2; in XXH64_update_endian()
797 v1 += XXH_readLE64(p, endian) * PRIME64_2; in XXH64_update_endian()
801 v2 += XXH_readLE64(p, endian) * PRIME64_2; in XXH64_update_endian()
805 v3 += XXH_readLE64(p, endian) * PRIME64_2; in XXH64_update_endian()
809 v4 += XXH_readLE64(p, endian) * PRIME64_2; in XXH64_update_endian()
859 v1 *= PRIME64_2; in XXH64_digest_endian()
865 v2 *= PRIME64_2; in XXH64_digest_endian()
871 v3 *= PRIME64_2; in XXH64_digest_endian()
877 v4 *= PRIME64_2; in XXH64_digest_endian()
893 k1 *= PRIME64_2; in XXH64_digest_endian()
904 h64 = XXH_rotl64(h64, 23) * PRIME64_2 + PRIME64_3; in XXH64_digest_endian()
916 h64 *= PRIME64_2; in XXH64_digest_endian()