585    uint writemask = inst->Dst[0].Register.WriteMask;  in tgsi_check_soa_dependencies()
606             if (inst->Dst[0].Register.WriteMask & (1 << chan)) {  in tgsi_check_soa_dependencies()
1908       if (inst->Dst[0].Register.WriteMask & (1 << chan)) {  in exec_tex()
1987       if (inst->Dst[0].Register.WriteMask & (1 << chan)) {  in exec_txd()
2059       if (inst->Dst[0].Register.WriteMask & (1 << chan)) {  in exec_txf()
2088       if (inst->Dst[0].Register.WriteMask & (1 << chan)) {  in exec_txq()
2200       if (inst->Dst[0].Register.WriteMask & (1 << chan)) {  in exec_sample()
2263       if (inst->Dst[0].Register.WriteMask & (1 << chan)) {  in exec_sample_d()
2424       if (inst->Dst[0].Register.WriteMask & (1 << chan)) {  in exec_vector()
2450       if (inst->Dst[0].Register.WriteMask & (1 << chan)) {  in exec_scalar_unary()
2467       if (inst->Dst[0].Register.WriteMask & (1 << chan)) {  in exec_vector_unary()
2475       if (inst->Dst[0].Register.WriteMask & (1 << chan)) {  in exec_vector_unary()
2500       if (inst->Dst[0].Register.WriteMask & (1 << chan)) {  in exec_scalar_binary()
2517       if (inst->Dst[0].Register.WriteMask & (1 << chan)) {  in exec_vector_binary()
2526       if (inst->Dst[0].Register.WriteMask & (1 << chan)) {  in exec_vector_binary()
2548       if (inst->Dst[0].Register.WriteMask & (1 << chan)) {  in exec_vector_trinary()
2558       if (inst->Dst[0].Register.WriteMask & (1 << chan)) {  in exec_vector_trinary()
2582       if (inst->Dst[0].Register.WriteMask & (1 << chan)) {  in exec_dp3()
2606       if (inst->Dst[0].Register.WriteMask & (1 << chan)) {  in exec_dp4()
2631       if (inst->Dst[0].Register.WriteMask & (1 << chan)) {  in exec_dp2a()
2660       if (inst->Dst[0].Register.WriteMask & (1 << chan)) {  in exec_dph()
2682       if (inst->Dst[0].Register.WriteMask & (1 << chan)) {  in exec_dp2()
2710       if (inst->Dst[0].Register.WriteMask & (1 << chan)) {  in exec_nrm4()
2721    if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_XYZ) {  in exec_nrm3()
2740          if (inst->Dst[0].Register.WriteMask & (1 << chan)) {  in exec_nrm3()
2747    if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {  in exec_nrm3()
2756    if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_XY) {  in exec_scs()
2762       if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {  in exec_scs()
2766       if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {  in exec_scs()
2771    if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {  in exec_scs()
2774    if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {  in exec_scs()
2788    if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_XZ) {  in exec_x2d()
2797    if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_YW) {  in exec_x2d()
2806    if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {  in exec_x2d()
2809    if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {  in exec_x2d()
2812    if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {  in exec_x2d()
2815    if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {  in exec_x2d()
2826    if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_XYZ) {  in exec_rfl()
2851       if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {  in exec_rfl()
2856       if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {  in exec_rfl()
2861       if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {  in exec_rfl()
2867    if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {  in exec_rfl()
2903    if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {  in exec_xpd()
2906    if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {  in exec_xpd()
2909    if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {  in exec_xpd()
2912    if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {  in exec_xpd()
2924    if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {  in exec_dst()
2929    if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {  in exec_dst()
2932    if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {  in exec_dst()
2936    if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {  in exec_dst()
2939    if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {  in exec_dst()
2942    if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {  in exec_dst()
2945    if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {  in exec_dst()
2960    if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {  in exec_log()
2963    if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {  in exec_log()
2968    if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {  in exec_log()
2971    if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {  in exec_log()
2984    if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {  in exec_exp()
2988    if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {  in exec_exp()
2992    if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {  in exec_exp()
2996    if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {  in exec_exp()
3008    if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_YZ) {  in exec_lit()
3010       if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {  in exec_lit()
3021       if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {  in exec_lit()
3026    if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {  in exec_lit()
3030    if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {  in exec_lit()