Lines Matching refs:WriteMask
1784 int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask); in tgsi_op2_s()
1787 if (!(inst->Dst[0].Register.WriteMask & (1 << i))) in tgsi_op2_s()
1843 int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask); in tgsi_ineg()
1847 if (!(inst->Dst[0].Register.WriteMask & (1 << i))) in tgsi_ineg()
1874 int last_slot = (inst->Dst[0].Register.WriteMask & 0x8) ? 4 : 3; in cayman_emit_float_instr()
1888 alu.dst.write = (inst->Dst[0].Register.WriteMask >> i) & 1; in cayman_emit_float_instr()
1904 int last_slot = (inst->Dst[0].Register.WriteMask & 0x8) ? 4 : 3; in cayman_mul_int_instr()
1906 if (!(inst->Dst[0].Register.WriteMask & (1 << k))) in cayman_mul_int_instr()
2011 int last_slot = (inst->Dst[0].Register.WriteMask & 0x8) ? 4 : 3; in cayman_trig()
2025 alu.dst.write = (inst->Dst[0].Register.WriteMask >> i) & 1; in cayman_trig()
2043 int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask); in tgsi_trig()
2064 if (!(inst->Dst[0].Register.WriteMask & (1 << i))) in tgsi_trig()
2090 if (likely(inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_XY)) { in tgsi_scs()
2097 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) { in tgsi_scs()
2131 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) { in tgsi_scs()
2164 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) { in tgsi_scs()
2182 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) { in tgsi_scs()
2257 if (inst->Dst[0].Register.WriteMask & (1 << 2)) in tgsi_lit()
2353 alu.dst.write = (inst->Dst[0].Register.WriteMask >> 0) & 1; in tgsi_lit()
2365 alu.dst.write = (inst->Dst[0].Register.WriteMask >> 1) & 1; in tgsi_lit()
2376 alu.dst.write = (inst->Dst[0].Register.WriteMask >> 3) & 1; in tgsi_lit()
2425 alu.dst.write = (inst->Dst[0].Register.WriteMask >> i) & 1; in tgsi_helper_tempx_replicate()
2461 int last_slot = (inst->Dst[0].Register.WriteMask & 0x8) ? 4 : 3; in cayman_pow()
2496 alu.dst.write = (inst->Dst[0].Register.WriteMask >> i) & 1; in cayman_pow()
2550 unsigned write_mask = inst->Dst[0].Register.WriteMask; in tgsi_divmod()
3415 unsigned write_mask = inst->Dst[0].Register.WriteMask; in tgsi_f2i()
3464 unsigned write_mask = inst->Dst[0].Register.WriteMask; in tgsi_iabs()
3520 unsigned write_mask = inst->Dst[0].Register.WriteMask; in tgsi_issg()
3637 if (!(inst->Dst[0].Register.WriteMask & (1 << i))) { in tgsi_helper_copy()
3661 int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask); in tgsi_op3()
3664 if (!(inst->Dst[0].Register.WriteMask & (1 << i))) in tgsi_op3()
3702 alu.dst.write = (inst->Dst[0].Register.WriteMask >> i) & 1; in tgsi_dp()
4084 tex.dst_sel_x = (inst->Dst[0].Register.WriteMask & 1) ? 0 : 7; in tgsi_tex()
4085 tex.dst_sel_y = (inst->Dst[0].Register.WriteMask & 2) ? 1 : 7; in tgsi_tex()
4086 tex.dst_sel_z = (inst->Dst[0].Register.WriteMask & 4) ? 2 : 7; in tgsi_tex()
4087 tex.dst_sel_w = (inst->Dst[0].Register.WriteMask & 8) ? 3 : 7; in tgsi_tex()
4167 int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask); in tgsi_lrp()
4174 if (!(inst->Dst[0].Register.WriteMask & (1 << i))) in tgsi_lrp()
4196 if (!(inst->Dst[0].Register.WriteMask & (1 << i))) in tgsi_lrp()
4218 if (!(inst->Dst[0].Register.WriteMask & (1 << i))) in tgsi_lrp()
4239 if (!(inst->Dst[0].Register.WriteMask & (1 << i))) in tgsi_lrp()
4267 int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask); in tgsi_cmp()
4270 if (!(inst->Dst[0].Register.WriteMask & (1 << i))) in tgsi_cmp()
4300 if (inst->Dst[0].Register.WriteMask != 0xf) in tgsi_xpd()
4371 if (inst->Dst[0].Register.WriteMask & 1) { in tgsi_exp()
4415 if ((inst->Dst[0].Register.WriteMask >> 1) & 1) { in tgsi_exp()
4438 if ((inst->Dst[0].Register.WriteMask >> 2) & 0x1) { in tgsi_exp()
4474 if ((inst->Dst[0].Register.WriteMask >> 3) & 0x1) { in tgsi_exp()
4500 if (inst->Dst[0].Register.WriteMask & 1) { in tgsi_log()
4551 if ((inst->Dst[0].Register.WriteMask >> 1) & 1) { in tgsi_log()
4693 if ((inst->Dst[0].Register.WriteMask >> 2) & 1) { in tgsi_log()
4732 if ((inst->Dst[0].Register.WriteMask >> 3) & 1) { in tgsi_log()
5185 int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask); in tgsi_umad()
5189 if (!(inst->Dst[0].Register.WriteMask & (1 << i))) in tgsi_umad()
5211 if (!(inst->Dst[0].Register.WriteMask & (1 << i))) in tgsi_umad()