Lines Matching refs:ISD
31 setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom); in AMDGPUTargetLowering()
35 setOperationAction(ISD::FCEIL, MVT::f32, Legal); in AMDGPUTargetLowering()
36 setOperationAction(ISD::FEXP2, MVT::f32, Legal); in AMDGPUTargetLowering()
37 setOperationAction(ISD::FRINT, MVT::f32, Legal); in AMDGPUTargetLowering()
39 setOperationAction(ISD::UDIV, MVT::i32, Expand); in AMDGPUTargetLowering()
40 setOperationAction(ISD::UDIVREM, MVT::i32, Custom); in AMDGPUTargetLowering()
41 setOperationAction(ISD::UREM, MVT::i32, Expand); in AMDGPUTargetLowering()
52 const SmallVectorImpl<ISD::InputArg> &Ins, in LowerFormalArguments()
68 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn()
89 case ISD::SDIV: return LowerSDIV(Op, DAG); in LowerOperation()
90 case ISD::SREM: return LowerSREM(Op, DAG); in LowerOperation()
91 case ISD::BUILD_VECTOR: return LowerBUILD_VECTOR(Op, DAG); in LowerOperation()
92 case ISD::SIGN_EXTEND_INREG: return LowerSIGN_EXTEND_INREG(Op, DAG); in LowerOperation()
93 case ISD::BRCOND: return LowerBRCOND(Op, DAG); in LowerOperation()
95 case ISD::INTRINSIC_WO_CHAIN: return LowerINTRINSIC_WO_CHAIN(Op, DAG); in LowerOperation()
96 case ISD::UDIVREM: return LowerUDIVREM(Op, DAG); in LowerOperation()
113 return DAG.getNode(ISD::FEXP2, DL, VT, Op.getOperand(1)); in LowerINTRINSIC_WO_CHAIN()
115 return DAG.getNode(ISD::FABS, DL, VT, Op.getOperand(1)); in LowerINTRINSIC_WO_CHAIN()
142 return DAG.getNode(ISD::FRINT, DL, VT, Op.getOperand(1)); in LowerINTRINSIC_WO_CHAIN()
144 return DAG.getNode(ISD::FCEIL, DL, VT, Op.getOperand(1)); in LowerINTRINSIC_WO_CHAIN()
155 SDValue Neg = DAG.getNode(ISD::SUB, DL, VT, DAG.getConstant(0, VT), in LowerIntrinsicIABS()
168 SDValue OneSubA = DAG.getNode(ISD::FSUB, DL, VT, in LowerIntrinsicLRP()
171 SDValue OneSubAC = DAG.getNode(ISD::FMUL, DL, VT, OneSubA, in LowerIntrinsicLRP()
196 SDValue RCP_LO = DAG.getNode(ISD::UMULO, DL, VT, RCP, Den); in LowerUDIVREM()
199 SDValue RCP_HI = DAG.getNode(ISD::MULHU, DL, VT, RCP, Den); in LowerUDIVREM()
202 SDValue NEG_RCP_LO = DAG.getNode(ISD::SUB, DL, VT, DAG.getConstant(0, VT), in LowerUDIVREM()
208 ISD::SETEQ); in LowerUDIVREM()
211 SDValue E = DAG.getNode(ISD::MULHU, DL, VT, ABS_RCP_LO, RCP); in LowerUDIVREM()
214 SDValue RCP_A_E = DAG.getNode(ISD::ADD, DL, VT, RCP, E); in LowerUDIVREM()
217 SDValue RCP_S_E = DAG.getNode(ISD::SUB, DL, VT, RCP, E); in LowerUDIVREM()
222 ISD::SETEQ); in LowerUDIVREM()
224 SDValue Quotient = DAG.getNode(ISD::MULHU, DL, VT, Tmp0, Num); in LowerUDIVREM()
227 SDValue Num_S_Remainder = DAG.getNode(ISD::UMULO, DL, VT, Quotient, Den); in LowerUDIVREM()
230 SDValue Remainder = DAG.getNode(ISD::SUB, DL, VT, Num, Num_S_Remainder); in LowerUDIVREM()
236 ISD::SETGE); in LowerUDIVREM()
242 ISD::SETGE); in LowerUDIVREM()
244 SDValue Tmp1 = DAG.getNode(ISD::AND, DL, VT, Remainder_GE_Den, in LowerUDIVREM()
250 SDValue Quotient_A_One = DAG.getNode(ISD::ADD, DL, VT, Quotient, in LowerUDIVREM()
254 SDValue Quotient_S_One = DAG.getNode(ISD::SUB, DL, VT, Quotient, in LowerUDIVREM()
259 Quotient, Quotient_A_One, ISD::SETEQ); in LowerUDIVREM()
263 Quotient_S_One, Div, ISD::SETEQ); in LowerUDIVREM()
268 SDValue Remainder_S_Den = DAG.getNode(ISD::SUB, DL, VT, Remainder, Den); in LowerUDIVREM()
271 SDValue Remainder_A_Den = DAG.getNode(ISD::ADD, DL, VT, Remainder, Den); in LowerUDIVREM()
275 Remainder, Remainder_S_Den, ISD::SETEQ); in LowerUDIVREM()
279 Remainder_A_Den, Rem, ISD::SETEQ); in LowerUDIVREM()