277     EVT VT = Op.getValueType();  in LowerOperation()  local
284       return CreateLiveInRegister(DAG, &AMDGPU::R600_TReg32RegClass, Reg, VT);  in LowerOperation()
288       return LowerImplicitParameter(DAG, VT, DL, 0);  in LowerOperation()
290       return LowerImplicitParameter(DAG, VT, DL, 1);  in LowerOperation()
292       return LowerImplicitParameter(DAG, VT, DL, 2);  in LowerOperation()
294       return LowerImplicitParameter(DAG, VT, DL, 3);  in LowerOperation()
296       return LowerImplicitParameter(DAG, VT, DL, 4);  in LowerOperation()
298       return LowerImplicitParameter(DAG, VT, DL, 5);  in LowerOperation()
300       return LowerImplicitParameter(DAG, VT, DL, 6);  in LowerOperation()
302       return LowerImplicitParameter(DAG, VT, DL, 7);  in LowerOperation()
304       return LowerImplicitParameter(DAG, VT, DL, 8);  in LowerOperation()
308                                   AMDGPU::T1_X, VT);  in LowerOperation()
311                                   AMDGPU::T1_Y, VT);  in LowerOperation()
314                                   AMDGPU::T1_Z, VT);  in LowerOperation()
317                                   AMDGPU::T0_X, VT);  in LowerOperation()
320                                   AMDGPU::T0_Y, VT);  in LowerOperation()
323                                   AMDGPU::T0_Z, VT);  in LowerOperation()
357 SDValue R600TargetLowering::LowerImplicitParameter(SelectionDAG &DAG, EVT VT,  in LowerImplicitParameter()  argument
362   PointerType * PtrType = PointerType::get(VT.getTypeForEVT(*DAG.getContext()),  in LowerImplicitParameter()
368   return DAG.getLoad(VT, DL, DAG.getEntryNode(),  in LowerImplicitParameter()
377   EVT VT = Op.getValueType();  in LowerROTL()  local
379   return DAG.getNode(AMDGPUISD::BITALIGN, DL, VT,  in LowerROTL()
382                      DAG.getNode(ISD::SUB, DL, VT,  in LowerROTL()
390   EVT VT = Op.getValueType();  in LowerSELECT_CC()  local
408   if (CompareVT !=  VT) {  in LowerSELECT_CC()
410     if (VT == MVT::f32 && CompareVT == MVT::i32) {  in LowerSELECT_CC()
416     } else if (VT == MVT::i32 && CompareVT == MVT::f32) {  in LowerSELECT_CC()
424     LHS = DAG.getNode(ConversionOp, DL, VT, LHS);  in LowerSELECT_CC()
425     RHS = DAG.getNode(ConversionOp, DL, VT, RHS);  in LowerSELECT_CC()
431     return DAG.getNode(ISD::SELECT_CC, DL, VT, LHS, RHS, True, False, CC);  in LowerSELECT_CC()
463       return DAG.getNode(ISD::SELECT, DL, VT, Cond, True, False);  in LowerSELECT_CC()
466       return DAG.getNode(ISD::SELECT_CC, DL, VT, LHS, RHS, True, False, CC);  in LowerSELECT_CC()
475   if (VT == MVT::f32) {  in LowerSELECT_CC()
476     HWTrue = DAG.getConstantFP(1.0f, VT);  in LowerSELECT_CC()
477     HWFalse = DAG.getConstantFP(0.0f, VT);  in LowerSELECT_CC()
478   } else if (VT == MVT::i32) {  in LowerSELECT_CC()
479     HWTrue = DAG.getConstant(-1, VT);  in LowerSELECT_CC()
480     HWFalse = DAG.getConstant(0, VT);  in LowerSELECT_CC()
488   SDValue Cond = DAG.getNode(ISD::SELECT_CC, DL, VT, LHS, RHS, HWTrue, HWFalse, CC);  in LowerSELECT_CC()
491   if (VT == MVT::f32) {  in LowerSELECT_CC()
493                        DAG.getNode(ISD::FNEG, DL, VT, Cond));  in LowerSELECT_CC()
496   return DAG.getNode(ISD::SELECT, DL, VT, Cond, True, False);  in LowerSELECT_CC()