Lines Matching refs:vcc
627 0x00000006, (ins brtarget:$target, VCCReg:$vcc),
632 0x00000007, (ins brtarget:$target, VCCReg:$vcc),
671 (ins VCCReg:$vcc, AllReg_32:$src0, VReg_32:$src1), "V_CNDMASK_B32",
673 (select VCCReg:$vcc, AllReg_32:$src0, VReg_32:$src1))] > {
675 let DisableEncoding = "$vcc";
680 (f32 (select VCCReg:$vcc, AllReg_32:$src0, VReg_32:$src1)),
681 (V_CNDMASK_B32 VCCReg:$vcc, AllReg_32:$src0, VReg_32:$src1)
854 [(set VCCReg:$vcc, (SIvcc_and SReg_64:$src0, SReg_64:$src1))]
980 (ins brtarget:$target, VCCReg:$vcc),
982 [(IL_brcond bb:$target, VCCReg:$vcc)]
987 (ins brtarget:$target, VCCReg:$vcc),
1042 (i64 (SIvcc_bitcast VCCReg:$vcc)),
1043 (S_MOV_B64 (COPY_TO_REGCLASS VCCReg:$vcc, SReg_64))
1047 (i1 (SIvcc_bitcast SReg_64:$vcc)),
1048 (COPY_TO_REGCLASS SReg_64:$vcc, VCCReg)