Lines Matching refs:zero_reg
157 zero_reg, in ToRegister()
572 Register nop_rt_reg = (type == 0) ? zero_reg : at; in IsNop()
574 rd == static_cast<uint32_t>(ToNumber(zero_reg)) && in IsNop()
1143 beq(zero_reg, zero_reg, offset); in b()
1149 bgezal(zero_reg, offset); in bal()
1169 DCHECK(!(rt.is(zero_reg))); in bgezc()
1176 DCHECK(!(rs.is(zero_reg))); in bgeuc()
1177 DCHECK(!(rt.is(zero_reg))); in bgeuc()
1185 DCHECK(!(rs.is(zero_reg))); in bgec()
1186 DCHECK(!(rt.is(zero_reg))); in bgec()
1193 DCHECK(kArchVariant != kMips64r6 || rs.is(zero_reg)); in bgezal()
1203 GenInstrImmediate(BGTZ, rs, zero_reg, offset); in bgtz()
1210 DCHECK(!(rt.is(zero_reg))); in bgtzc()
1211 GenInstrImmediate(BGTZL, zero_reg, rt, offset); in bgtzc()
1217 GenInstrImmediate(BLEZ, rs, zero_reg, offset); in blez()
1224 DCHECK(!(rt.is(zero_reg))); in blezc()
1225 GenInstrImmediate(BLEZL, zero_reg, rt, offset); in blezc()
1231 DCHECK(!(rt.is(zero_reg))); in bltzc()
1238 DCHECK(!(rs.is(zero_reg))); in bltuc()
1239 DCHECK(!(rt.is(zero_reg))); in bltuc()
1247 DCHECK(!(rs.is(zero_reg))); in bltc()
1248 DCHECK(!(rt.is(zero_reg))); in bltc()
1262 DCHECK(kArchVariant != kMips64r6 || rs.is(zero_reg)); in bltzal()
1279 DCHECK(!(rs.is(zero_reg))); in bovc()
1287 DCHECK(!(rs.is(zero_reg))); in bnvc()
1295 DCHECK(!(rt.is(zero_reg))); in blezalc()
1296 GenInstrImmediate(BLEZ, zero_reg, rt, offset); in blezalc()
1302 DCHECK(!(rt.is(zero_reg))); in bgezalc()
1309 DCHECK(!(rs.is(zero_reg))); in bgezall()
1316 DCHECK(!(rt.is(zero_reg))); in bltzalc()
1323 DCHECK(!(rt.is(zero_reg))); in bgtzalc()
1324 GenInstrImmediate(BGTZ, zero_reg, rt, offset); in bgtzalc()
1330 DCHECK(!(rt.is(zero_reg))); in beqzalc()
1331 GenInstrImmediate(ADDI, zero_reg, rt, offset); in beqzalc()
1337 DCHECK(!(rt.is(zero_reg))); in bnezalc()
1338 GenInstrImmediate(DADDI, zero_reg, rt, offset); in bnezalc()
1351 DCHECK(!(rs.is(zero_reg))); in beqzc()
1366 DCHECK(!(rs.is(zero_reg))); in bnezc()
1390 GenInstrRegister(SPECIAL, rs, zero_reg, zero_reg, 0, JR); in jr()
1393 jalr(rs, zero_reg); in jr()
1414 GenInstrRegister(SPECIAL, rs, zero_reg, rd, 0, JALR); in jalr()
1517 GenInstrRegister(SPECIAL, rs, rt, zero_reg, 0, MULT); in mult()
1523 GenInstrRegister(SPECIAL, rs, rt, zero_reg, 0, MULTU); in multu()
1533 GenInstrRegister(SPECIAL, rs, rt, zero_reg, 0, DIV); in div()
1550 GenInstrRegister(SPECIAL, rs, rt, zero_reg, 0, DIVU); in divu()
1577 GenInstrRegister(SPECIAL, rs, rt, zero_reg, 0, DMULT); in dmult()
1582 GenInstrRegister(SPECIAL, rs, rt, zero_reg, 0, DMULTU); in dmultu()
1587 GenInstrRegister(SPECIAL, rs, rt, zero_reg, 0, DDIV); in ddiv()
1604 GenInstrRegister(SPECIAL, rs, rt, zero_reg, 0, DDIVU); in ddivu()
1669 DCHECK(coming_from_nop || !(rd.is(zero_reg) && rt.is(zero_reg))); in sll()
1670 GenInstrRegister(SPECIAL, zero_reg, rt, rd, sa, SLL); in sll()
1680 GenInstrRegister(SPECIAL, zero_reg, rt, rd, sa, SRL); in srl()
1690 GenInstrRegister(SPECIAL, zero_reg, rt, rd, sa, SRA); in sra()
1720 GenInstrRegister(SPECIAL, zero_reg, rt, rd, sa, DSLL); in dsll()
1730 GenInstrRegister(SPECIAL, zero_reg, rt, rd, sa, DSRL); in dsrl()
1756 GenInstrRegister(SPECIAL, zero_reg, rt, rd, sa, DSRA); in dsra()
1766 GenInstrRegister(SPECIAL, zero_reg, rt, rd, sa, DSLL32); in dsll32()
1771 GenInstrRegister(SPECIAL, zero_reg, rt, rd, sa, DSRL32); in dsrl32()
1776 GenInstrRegister(SPECIAL, zero_reg, rt, rd, sa, DSRA32); in dsra32()
1786 daddiu(at, zero_reg, (src.offset_ >> kLuiShift) & kImm16Mask); in LoadRegPlusOffsetToAt()
1905 GenInstrImmediate(LUI, zero_reg, rd, j); in lui()
2061 GenInstrRegister(SPECIAL, zero_reg, zero_reg, rd, 0, MFHI); in mfhi()
2066 GenInstrRegister(SPECIAL, zero_reg, zero_reg, rd, 0, MFLO); in mflo()
2174 GenInstrRegister(SPECIAL, rs, zero_reg, rd, 1, CLZ_R6); in clz()
2533 mtc1(zero_reg, f14); in fcmp()