75   LOperand* destination = moves_[index].destination();  in PerformMove()  local
84     if (other_move.Blocks(destination) && !other_move.IsPending()) {  in PerformMove()
100   moves_[index].set_destination(destination);  in PerformMove()
104   if (moves_[index].source()->Equals(destination)) {  in PerformMove()
114     if (other_move.Blocks(destination)) {  in PerformMove()
130     LOperand* destination = moves_[i].destination();  in Verify()  local
132       SLOW_DCHECK(!destination->Equals(moves_[j].destination()));  in Verify()
144   LOperand* destination = moves_[index].destination();  in EmitMove()  local
150     if (destination->IsRegister()) {  in EmitMove()
151       Register dst = cgen_->ToRegister(destination);  in EmitMove()
154       DCHECK(destination->IsStackSlot());  in EmitMove()
155       Operand dst = cgen_->ToOperand(destination);  in EmitMove()
161     if (destination->IsRegister()) {  in EmitMove()
162       Register dst = cgen_->ToRegister(destination);  in EmitMove()
165       DCHECK(destination->IsStackSlot());  in EmitMove()
166       Operand dst = cgen_->ToOperand(destination);  in EmitMove()
173     if (destination->IsRegister()) {  in EmitMove()
174       Register dst = cgen_->ToRegister(destination);  in EmitMove()
189     } else if (destination->IsDoubleRegister()) {  in EmitMove()
192       XMMRegister dst = cgen_->ToDoubleRegister(destination);  in EmitMove()
200       DCHECK(destination->IsStackSlot());  in EmitMove()
201       Operand dst = cgen_->ToOperand(destination);  in EmitMove()
215     if (destination->IsDoubleRegister()) {  in EmitMove()
216       __ movaps(cgen_->ToDoubleRegister(destination), src);  in EmitMove()
218       DCHECK(destination->IsDoubleStackSlot());  in EmitMove()
219       __ movsd(cgen_->ToOperand(destination), src);  in EmitMove()
223     if (destination->IsDoubleRegister()) {  in EmitMove()
224       __ movsd(cgen_->ToDoubleRegister(destination), src);  in EmitMove()
226       DCHECK(destination->IsDoubleStackSlot());  in EmitMove()
228       __ movsd(cgen_->ToOperand(destination), xmm0);  in EmitMove()
240   LOperand* destination = moves_[index].destination();  in EmitSwap()  local
244   if (source->IsRegister() && destination->IsRegister()) {  in EmitSwap()
247     Register dst = cgen_->ToRegister(destination);  in EmitSwap()
250   } else if ((source->IsRegister() && destination->IsStackSlot()) ||  in EmitSwap()
251              (source->IsStackSlot() && destination->IsRegister())) {  in EmitSwap()
254         cgen_->ToRegister(source->IsRegister() ? source : destination);  in EmitSwap()
256         cgen_->ToOperand(source->IsRegister() ? destination : source);  in EmitSwap()
261   } else if ((source->IsStackSlot() && destination->IsStackSlot()) ||  in EmitSwap()
262       (source->IsDoubleStackSlot() && destination->IsDoubleStackSlot())) {  in EmitSwap()
265     Operand dst = cgen_->ToOperand(destination);  in EmitSwap()
271   } else if (source->IsDoubleRegister() && destination->IsDoubleRegister()) {  in EmitSwap()
274     XMMRegister destination_reg = cgen_->ToDoubleRegister(destination);  in EmitSwap()
279   } else if (source->IsDoubleRegister() || destination->IsDoubleRegister()) {  in EmitSwap()
281     DCHECK((source->IsDoubleRegister() && destination->IsDoubleStackSlot()) ||  in EmitSwap()
282            (source->IsDoubleStackSlot() && destination->IsDoubleRegister()));  in EmitSwap()
285                                                   : destination);  in EmitSwap()
286     LOperand* other = source->IsDoubleRegister() ? destination : source;  in EmitSwap()
308       moves_[i].set_source(destination);  in EmitSwap()
309     } else if (other_move.Blocks(destination)) {  in EmitSwap()