Lines Matching refs:INSN
2392 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_ARM64_data_processing_immediate() macro
2404 if (INSN(28,24) == BITS5(1,0,0,0,1)) { in dis_ARM64_data_processing_immediate()
2405 Bool is64 = INSN(31,31) == 1; in dis_ARM64_data_processing_immediate()
2406 Bool isSub = INSN(30,30) == 1; in dis_ARM64_data_processing_immediate()
2407 Bool setCC = INSN(29,29) == 1; in dis_ARM64_data_processing_immediate()
2408 UInt sh = INSN(23,22); in dis_ARM64_data_processing_immediate()
2409 UInt uimm12 = INSN(21,10); in dis_ARM64_data_processing_immediate()
2410 UInt nn = INSN(9,5); in dis_ARM64_data_processing_immediate()
2411 UInt dd = INSN(4,0); in dis_ARM64_data_processing_immediate()
2460 if (INSN(28,24) == BITS5(1,0,0,0,0)) { in dis_ARM64_data_processing_immediate()
2461 UInt bP = INSN(31,31); in dis_ARM64_data_processing_immediate()
2462 UInt immLo = INSN(30,29); in dis_ARM64_data_processing_immediate()
2463 UInt immHi = INSN(23,5); in dis_ARM64_data_processing_immediate()
2464 UInt rD = INSN(4,0); in dis_ARM64_data_processing_immediate()
2479 if (INSN(28,23) == BITS6(1,0,0,1,0,0)) { in dis_ARM64_data_processing_immediate()
2487 Bool is64 = INSN(31,31) == 1; in dis_ARM64_data_processing_immediate()
2488 UInt op = INSN(30,29); in dis_ARM64_data_processing_immediate()
2489 UInt N = INSN(22,22); in dis_ARM64_data_processing_immediate()
2490 UInt immR = INSN(21,16); in dis_ARM64_data_processing_immediate()
2491 UInt immS = INSN(15,10); in dis_ARM64_data_processing_immediate()
2492 UInt nn = INSN(9,5); in dis_ARM64_data_processing_immediate()
2493 UInt dd = INSN(4,0); in dis_ARM64_data_processing_immediate()
2544 if (INSN(28,23) == BITS6(1,0,0,1,0,1)) { in dis_ARM64_data_processing_immediate()
2551 Bool is64 = INSN(31,31) == 1; in dis_ARM64_data_processing_immediate()
2552 UInt subopc = INSN(30,29); in dis_ARM64_data_processing_immediate()
2553 UInt hw = INSN(22,21); in dis_ARM64_data_processing_immediate()
2554 UInt imm16 = INSN(20,5); in dis_ARM64_data_processing_immediate()
2555 UInt dd = INSN(4,0); in dis_ARM64_data_processing_immediate()
2625 if (INSN(28,23) == BITS6(1,0,0,1,1,0)) { in dis_ARM64_data_processing_immediate()
2626 UInt sf = INSN(31,31); in dis_ARM64_data_processing_immediate()
2627 UInt opc = INSN(30,29); in dis_ARM64_data_processing_immediate()
2628 UInt N = INSN(22,22); in dis_ARM64_data_processing_immediate()
2629 UInt immR = INSN(21,16); in dis_ARM64_data_processing_immediate()
2630 UInt immS = INSN(15,10); in dis_ARM64_data_processing_immediate()
2631 UInt nn = INSN(9,5); in dis_ARM64_data_processing_immediate()
2632 UInt dd = INSN(4,0); in dis_ARM64_data_processing_immediate()
2690 if (INSN(30,23) == BITS8(0,0,1,0,0,1,1,1) && INSN(21,21) == 0) { in dis_ARM64_data_processing_immediate()
2691 Bool is64 = INSN(31,31) == 1; in dis_ARM64_data_processing_immediate()
2692 UInt mm = INSN(20,16); in dis_ARM64_data_processing_immediate()
2693 UInt imm6 = INSN(15,10); in dis_ARM64_data_processing_immediate()
2694 UInt nn = INSN(9,5); in dis_ARM64_data_processing_immediate()
2695 UInt dd = INSN(4,0); in dis_ARM64_data_processing_immediate()
2697 if (INSN(31,31) != INSN(22,22)) in dis_ARM64_data_processing_immediate()
2727 # undef INSN in dis_ARM64_data_processing_immediate()
2794 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_ARM64_data_processing_register() macro
2807 if (INSN(28,24) == BITS5(0,1,0,1,1) && INSN(21,21) == 0) { in dis_ARM64_data_processing_register()
2808 UInt bX = INSN(31,31); in dis_ARM64_data_processing_register()
2809 UInt bOP = INSN(30,30); /* 0: ADD, 1: SUB */ in dis_ARM64_data_processing_register()
2810 UInt bS = INSN(29, 29); /* set flags? */ in dis_ARM64_data_processing_register()
2811 UInt sh = INSN(23,22); in dis_ARM64_data_processing_register()
2812 UInt rM = INSN(20,16); in dis_ARM64_data_processing_register()
2813 UInt imm6 = INSN(15,10); in dis_ARM64_data_processing_register()
2814 UInt rN = INSN(9,5); in dis_ARM64_data_processing_register()
2815 UInt rD = INSN(4,0); in dis_ARM64_data_processing_register()
2851 if (INSN(28,21) == BITS8(1,1,0,1,0,0,0,0) && INSN(15,10) == 0 ) { in dis_ARM64_data_processing_register()
2852 UInt bX = INSN(31,31); in dis_ARM64_data_processing_register()
2853 UInt bOP = INSN(30,30); /* 0: ADC, 1: SBC */ in dis_ARM64_data_processing_register()
2854 UInt bS = INSN(29,29); /* set flags */ in dis_ARM64_data_processing_register()
2855 UInt rM = INSN(20,16); in dis_ARM64_data_processing_register()
2856 UInt rN = INSN(9,5); in dis_ARM64_data_processing_register()
2857 UInt rD = INSN(4,0); in dis_ARM64_data_processing_register()
2916 if (INSN(28,24) == BITS5(0,1,0,1,0)) { in dis_ARM64_data_processing_register()
2917 UInt bX = INSN(31,31); in dis_ARM64_data_processing_register()
2918 UInt sh = INSN(23,22); in dis_ARM64_data_processing_register()
2919 UInt bN = INSN(21,21); in dis_ARM64_data_processing_register()
2920 UInt rM = INSN(20,16); in dis_ARM64_data_processing_register()
2921 UInt imm6 = INSN(15,10); in dis_ARM64_data_processing_register()
2922 UInt rN = INSN(9,5); in dis_ARM64_data_processing_register()
2923 UInt rD = INSN(4,0); in dis_ARM64_data_processing_register()
2933 switch (INSN(30,29)) { in dis_ARM64_data_processing_register()
2941 if (INSN(30,29) == BITS2(1,1)) { in dis_ARM64_data_processing_register()
2948 vassert(((bN << 2) | INSN(30,29)) < 8); in dis_ARM64_data_processing_register()
2949 const HChar* nm_op = names_op[(bN << 2) | INSN(30,29)]; in dis_ARM64_data_processing_register()
2968 if (INSN(31,24) == BITS8(1,0,0,1,1,0,1,1) in dis_ARM64_data_processing_register()
2969 && INSN(22,21) == BITS2(1,0) && INSN(15,10) == BITS6(0,1,1,1,1,1)) { in dis_ARM64_data_processing_register()
2970 Bool isU = INSN(23,23) == 1; in dis_ARM64_data_processing_register()
2971 UInt mm = INSN(20,16); in dis_ARM64_data_processing_register()
2972 UInt nn = INSN(9,5); in dis_ARM64_data_processing_register()
2973 UInt dd = INSN(4,0); in dis_ARM64_data_processing_register()
2988 if (INSN(30,21) == BITS10(0,0,1,1,0,1,1,0,0,0)) { in dis_ARM64_data_processing_register()
2989 Bool is64 = INSN(31,31) == 1; in dis_ARM64_data_processing_register()
2990 UInt mm = INSN(20,16); in dis_ARM64_data_processing_register()
2991 Bool isAdd = INSN(15,15) == 0; in dis_ARM64_data_processing_register()
2992 UInt aa = INSN(14,10); in dis_ARM64_data_processing_register()
2993 UInt nn = INSN(9,5); in dis_ARM64_data_processing_register()
2994 UInt dd = INSN(4,0); in dis_ARM64_data_processing_register()
3023 if (INSN(29,21) == BITS9(0, 1,1,0,1, 0,1,0,0) && INSN(11,11) == 0) { in dis_ARM64_data_processing_register()
3024 Bool is64 = INSN(31,31) == 1; in dis_ARM64_data_processing_register()
3025 UInt b30 = INSN(30,30); in dis_ARM64_data_processing_register()
3026 UInt mm = INSN(20,16); in dis_ARM64_data_processing_register()
3027 UInt cond = INSN(15,12); in dis_ARM64_data_processing_register()
3028 UInt b10 = INSN(10,10); in dis_ARM64_data_processing_register()
3029 UInt nn = INSN(9,5); in dis_ARM64_data_processing_register()
3030 UInt dd = INSN(4,0); in dis_ARM64_data_processing_register()
3095 if (INSN(28,21) == BITS8(0,1,0,1,1,0,0,1) && INSN(12,10) <= 4) { in dis_ARM64_data_processing_register()
3096 Bool is64 = INSN(31,31) == 1; in dis_ARM64_data_processing_register()
3097 Bool isSub = INSN(30,30) == 1; in dis_ARM64_data_processing_register()
3098 Bool setCC = INSN(29,29) == 1; in dis_ARM64_data_processing_register()
3099 UInt mm = INSN(20,16); in dis_ARM64_data_processing_register()
3100 UInt opt = INSN(15,13); in dis_ARM64_data_processing_register()
3101 UInt imm3 = INSN(12,10); in dis_ARM64_data_processing_register()
3102 UInt nn = INSN(9,5); in dis_ARM64_data_processing_register()
3103 UInt dd = INSN(4,0); in dis_ARM64_data_processing_register()
3191 if (INSN(29,21) == BITS9(1,1,1,0,1,0,0,1,0) in dis_ARM64_data_processing_register()
3192 && INSN(11,10) == BITS2(1,0) && INSN(4,4) == 0) { in dis_ARM64_data_processing_register()
3193 Bool is64 = INSN(31,31) == 1; in dis_ARM64_data_processing_register()
3194 Bool isSUB = INSN(30,30) == 1; in dis_ARM64_data_processing_register()
3195 UInt imm5 = INSN(20,16); in dis_ARM64_data_processing_register()
3196 UInt cond = INSN(15,12); in dis_ARM64_data_processing_register()
3197 UInt nn = INSN(9,5); in dis_ARM64_data_processing_register()
3198 UInt nzcv = INSN(3,0); in dis_ARM64_data_processing_register()
3230 if (INSN(29,21) == BITS9(1,1,1,0,1,0,0,1,0) in dis_ARM64_data_processing_register()
3231 && INSN(11,10) == BITS2(0,0) && INSN(4,4) == 0) { in dis_ARM64_data_processing_register()
3232 Bool is64 = INSN(31,31) == 1; in dis_ARM64_data_processing_register()
3233 Bool isSUB = INSN(30,30) == 1; in dis_ARM64_data_processing_register()
3234 UInt mm = INSN(20,16); in dis_ARM64_data_processing_register()
3235 UInt cond = INSN(15,12); in dis_ARM64_data_processing_register()
3236 UInt nn = INSN(9,5); in dis_ARM64_data_processing_register()
3237 UInt nzcv = INSN(3,0); in dis_ARM64_data_processing_register()
3276 if (INSN(30,21) == BITS10(1,0,1,1,0,1,0,1,1,0) in dis_ARM64_data_processing_register()
3277 && INSN(20,12) == BITS9(0,0,0,0,0,0,0,0,0)) { in dis_ARM64_data_processing_register()
3278 UInt b31 = INSN(31,31); in dis_ARM64_data_processing_register()
3279 UInt opc = INSN(11,10); in dis_ARM64_data_processing_register()
3291 UInt nn = INSN(9,5); in dis_ARM64_data_processing_register()
3292 UInt dd = INSN(4,0); in dis_ARM64_data_processing_register()
3335 if (INSN(30,21) == BITS10(1,0,1,1,0,1,0,1,1,0) in dis_ARM64_data_processing_register()
3336 && INSN(20,11) == BITS10(0,0,0,0,0,0,0,0,1,0)) { in dis_ARM64_data_processing_register()
3337 Bool is64 = INSN(31,31) == 1; in dis_ARM64_data_processing_register()
3338 Bool isCLS = INSN(10,10) == 1; in dis_ARM64_data_processing_register()
3339 UInt nn = INSN(9,5); in dis_ARM64_data_processing_register()
3340 UInt dd = INSN(4,0); in dis_ARM64_data_processing_register()
3385 if (INSN(30,21) == BITS10(0,0,1,1,0,1,0,1,1,0) in dis_ARM64_data_processing_register()
3386 && INSN(15,12) == BITS4(0,0,1,0)) { in dis_ARM64_data_processing_register()
3387 Bool is64 = INSN(31,31) == 1; in dis_ARM64_data_processing_register()
3388 UInt mm = INSN(20,16); in dis_ARM64_data_processing_register()
3389 UInt op = INSN(11,10); in dis_ARM64_data_processing_register()
3390 UInt nn = INSN(9,5); in dis_ARM64_data_processing_register()
3391 UInt dd = INSN(4,0); in dis_ARM64_data_processing_register()
3444 if (INSN(30,21) == BITS10(0,0,1,1,0,1,0,1,1,0) in dis_ARM64_data_processing_register()
3445 && INSN(15,11) == BITS5(0,0,0,0,1)) { in dis_ARM64_data_processing_register()
3446 Bool is64 = INSN(31,31) == 1; in dis_ARM64_data_processing_register()
3447 UInt mm = INSN(20,16); in dis_ARM64_data_processing_register()
3448 Bool isS = INSN(10,10) == 1; in dis_ARM64_data_processing_register()
3449 UInt nn = INSN(9,5); in dis_ARM64_data_processing_register()
3450 UInt dd = INSN(4,0); in dis_ARM64_data_processing_register()
3475 if (INSN(31,24) == BITS8(1,0,0,1,1,0,1,1) && INSN(22,21) == BITS2(0,1)) { in dis_ARM64_data_processing_register()
3476 Bool isU = INSN(23,23) == 1; in dis_ARM64_data_processing_register()
3477 UInt mm = INSN(20,16); in dis_ARM64_data_processing_register()
3478 Bool isAdd = INSN(15,15) == 0; in dis_ARM64_data_processing_register()
3479 UInt aa = INSN(14,10); in dis_ARM64_data_processing_register()
3480 UInt nn = INSN(9,5); in dis_ARM64_data_processing_register()
3481 UInt dd = INSN(4,0); in dis_ARM64_data_processing_register()
3502 # undef INSN in dis_ARM64_data_processing_register()
4637 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_ARM64_load_store() macro
4656 if (INSN(29,23) == BITS7(1,1,1,0,0,1,0)) { in dis_ARM64_load_store()
4657 UInt szLg2 = INSN(31,30); in dis_ARM64_load_store()
4659 Bool isLD = INSN(22,22) == 1; in dis_ARM64_load_store()
4660 UInt offs = INSN(21,10) * szB; in dis_ARM64_load_store()
4661 UInt nn = INSN(9,5); in dis_ARM64_load_store()
4662 UInt tt = INSN(4,0); in dis_ARM64_load_store()
4706 if ((INSN(29,21) & BITS9(1,1,1, 1,1,1,1,0, 1)) in dis_ARM64_load_store()
4708 UInt szLg2 = INSN(31,30); in dis_ARM64_load_store()
4710 Bool isLoad = INSN(22,22) == 1; in dis_ARM64_load_store()
4711 UInt imm9 = INSN(20,12); in dis_ARM64_load_store()
4712 UInt nn = INSN(9,5); in dis_ARM64_load_store()
4713 UInt tt = INSN(4,0); in dis_ARM64_load_store()
4714 Bool wBack = INSN(10,10) == 1; in dis_ARM64_load_store()
4715 UInt how = INSN(11,10); in dis_ARM64_load_store()
4808 UInt insn_30_23 = INSN(30,23); in dis_ARM64_load_store()
4812 UInt bL = INSN(22,22); in dis_ARM64_load_store()
4813 UInt bX = INSN(31,31); in dis_ARM64_load_store()
4814 UInt bWBack = INSN(23,23); in dis_ARM64_load_store()
4815 UInt rT1 = INSN(4,0); in dis_ARM64_load_store()
4816 UInt rN = INSN(9,5); in dis_ARM64_load_store()
4817 UInt rT2 = INSN(14,10); in dis_ARM64_load_store()
4818 Long simm7 = (Long)sx_to_64(INSN(21,15), 7); in dis_ARM64_load_store()
4834 switch (INSN(24,23)) { in dis_ARM64_load_store()
4858 && INSN(24,23) == BITS2(1,1) && rN == 31 && bL == 0; in dis_ARM64_load_store()
4894 switch (INSN(24,23)) { in dis_ARM64_load_store()
4923 if (INSN(29,24) == BITS6(0,1,1,0,0,0) && INSN(31,31) == 0) { in dis_ARM64_load_store()
4924 UInt imm19 = INSN(23,5); in dis_ARM64_load_store()
4925 UInt rT = INSN(4,0); in dis_ARM64_load_store()
4926 UInt bX = INSN(30,30); in dis_ARM64_load_store()
4950 if (INSN(29,23) == BITS7(1,1,1,0,0,0,0) in dis_ARM64_load_store()
4951 && INSN(21,21) == 1 && INSN(11,10) == BITS2(1,0)) { in dis_ARM64_load_store()
4953 UInt szLg2 = INSN(31,30); in dis_ARM64_load_store()
4954 Bool isLD = INSN(22,22) == 1; in dis_ARM64_load_store()
4955 UInt tt = INSN(4,0); in dis_ARM64_load_store()
5012 if (INSN(29,23) == BITS7(1,1,1,0,0,1,1)) { in dis_ARM64_load_store()
5015 switch ((INSN(31,30) << 1) | INSN(22,22)) { in dis_ARM64_load_store()
5023 UInt szLg2 = INSN(31,30); in dis_ARM64_load_store()
5024 UInt bitX = INSN(22,22); in dis_ARM64_load_store()
5025 UInt imm12 = INSN(21,10); in dis_ARM64_load_store()
5026 UInt nn = INSN(9,5); in dis_ARM64_load_store()
5027 UInt tt = INSN(4,0); in dis_ARM64_load_store()
5081 if (INSN(29,23) == BITS7(1,1,1,0,0,0,1) in dis_ARM64_load_store()
5082 && INSN(21,21) == 0 && INSN(10,10) == 1) { in dis_ARM64_load_store()
5085 switch ((INSN(31,30) << 1) | INSN(22,22)) { in dis_ARM64_load_store()
5093 UInt szLg2 = INSN(31,30); in dis_ARM64_load_store()
5094 UInt imm9 = INSN(20,12); in dis_ARM64_load_store()
5095 Bool atRN = INSN(11,11) == 0; in dis_ARM64_load_store()
5096 UInt nn = INSN(9,5); in dis_ARM64_load_store()
5097 UInt tt = INSN(4,0); in dis_ARM64_load_store()
5102 Bool is64 = INSN(22,22) == 0; in dis_ARM64_load_store()
5159 if (INSN(29,23) == BITS7(1,1,1,0,0,0,1) in dis_ARM64_load_store()
5160 && INSN(21,21) == 0 && INSN(11,10) == BITS2(0,0)) { in dis_ARM64_load_store()
5163 switch ((INSN(31,30) << 1) | INSN(22,22)) { in dis_ARM64_load_store()
5171 UInt szLg2 = INSN(31,30); in dis_ARM64_load_store()
5172 UInt imm9 = INSN(20,12); in dis_ARM64_load_store()
5173 UInt nn = INSN(9,5); in dis_ARM64_load_store()
5174 UInt tt = INSN(4,0); in dis_ARM64_load_store()
5178 Bool is64 = INSN(22,22) == 0; in dis_ARM64_load_store()
5248 if (INSN(29,25) == BITS5(1,0,1,1,0)) { in dis_ARM64_load_store()
5249 UInt szSlg2 = INSN(31,30); // log2 of the xfer size in 32-bit units in dis_ARM64_load_store()
5250 Bool isLD = INSN(22,22) == 1; in dis_ARM64_load_store()
5251 Bool wBack = INSN(23,23) == 1; in dis_ARM64_load_store()
5252 Long simm7 = (Long)sx_to_64(INSN(21,15), 7); in dis_ARM64_load_store()
5253 UInt tt2 = INSN(14,10); in dis_ARM64_load_store()
5254 UInt nn = INSN(9,5); in dis_ARM64_load_store()
5255 UInt tt1 = INSN(4,0); in dis_ARM64_load_store()
5271 switch (INSN(24,23)) { in dis_ARM64_load_store()
5306 && INSN(24,23) == BITS2(1,1) && nn == 31 && !isLD; in dis_ARM64_load_store()
5333 switch (INSN(24,23)) { in dis_ARM64_load_store()
5371 if (INSN(29,24) == BITS6(1,1,1,1,0,0) in dis_ARM64_load_store()
5372 && INSN(21,21) == 1 && INSN(11,10) == BITS2(1,0)) { in dis_ARM64_load_store()
5374 UInt szLg2 = (INSN(23,23) << 2) | INSN(31,30); in dis_ARM64_load_store()
5375 Bool isLD = INSN(22,22) == 1; in dis_ARM64_load_store()
5376 UInt tt = INSN(4,0); in dis_ARM64_load_store()
5448 if (INSN(29,23) == BITS7(1,1,1,0,0,0,1) in dis_ARM64_load_store()
5449 && INSN(21,21) == 1 && INSN(11,10) == BITS2(1,0)) { in dis_ARM64_load_store()
5451 UInt szLg2 = INSN(31,30); in dis_ARM64_load_store()
5452 Bool sxTo64 = INSN(22,22) == 0; // else sx to 32 and zx to 64 in dis_ARM64_load_store()
5453 UInt tt = INSN(4,0); in dis_ARM64_load_store()
5506 if (INSN(29,24) == BITS6(1,1,1,1,0,1) in dis_ARM64_load_store()
5507 && ((INSN(23,23) << 2) | INSN(31,30)) <= 4) { in dis_ARM64_load_store()
5508 UInt szLg2 = (INSN(23,23) << 2) | INSN(31,30); in dis_ARM64_load_store()
5509 Bool isLD = INSN(22,22) == 1; in dis_ARM64_load_store()
5510 UInt pimm12 = INSN(21,10) << szLg2; in dis_ARM64_load_store()
5511 UInt nn = INSN(9,5); in dis_ARM64_load_store()
5512 UInt tt = INSN(4,0); in dis_ARM64_load_store()
5550 if (INSN(29,24) == BITS6(1,1,1,1,0,0) in dis_ARM64_load_store()
5551 && ((INSN(23,23) << 2) | INSN(31,30)) <= 4 in dis_ARM64_load_store()
5552 && INSN(21,21) == 0 && INSN(10,10) == 1) { in dis_ARM64_load_store()
5553 UInt szLg2 = (INSN(23,23) << 2) | INSN(31,30); in dis_ARM64_load_store()
5554 Bool isLD = INSN(22,22) == 1; in dis_ARM64_load_store()
5555 UInt imm9 = INSN(20,12); in dis_ARM64_load_store()
5556 Bool atRN = INSN(11,11) == 0; in dis_ARM64_load_store()
5557 UInt nn = INSN(9,5); in dis_ARM64_load_store()
5558 UInt tt = INSN(4,0); in dis_ARM64_load_store()
5596 if (INSN(29,24) == BITS6(1,1,1,1,0,0) in dis_ARM64_load_store()
5597 && ((INSN(23,23) << 2) | INSN(31,30)) <= 4 in dis_ARM64_load_store()
5598 && INSN(21,21) == 0 && INSN(11,10) == BITS2(0,0)) { in dis_ARM64_load_store()
5599 UInt szLg2 = (INSN(23,23) << 2) | INSN(31,30); in dis_ARM64_load_store()
5600 Bool isLD = INSN(22,22) == 1; in dis_ARM64_load_store()
5601 UInt imm9 = INSN(20,12); in dis_ARM64_load_store()
5602 UInt nn = INSN(9,5); in dis_ARM64_load_store()
5603 UInt tt = INSN(4,0); in dis_ARM64_load_store()
5628 if (INSN(29,24) == BITS6(0,1,1,1,0,0) && INSN(31,30) < BITS2(1,1)) { in dis_ARM64_load_store()
5629 UInt szB = 4 << INSN(31,30); in dis_ARM64_load_store()
5630 UInt imm19 = INSN(23,5); in dis_ARM64_load_store()
5631 UInt tt = INSN(4,0); in dis_ARM64_load_store()
5662 if (INSN(31,31) == 0 && INSN(29,24) == BITS6(0,0,1,1,0,0) in dis_ARM64_load_store()
5663 && INSN(21,21) == 0) { in dis_ARM64_load_store()
5664 Bool bitQ = INSN(30,30); in dis_ARM64_load_store()
5665 Bool isPX = INSN(23,23) == 1; in dis_ARM64_load_store()
5666 Bool isLD = INSN(22,22) == 1; in dis_ARM64_load_store()
5667 UInt mm = INSN(20,16); in dis_ARM64_load_store()
5668 UInt opc = INSN(15,12); in dis_ARM64_load_store()
5669 UInt sz = INSN(11,10); in dis_ARM64_load_store()
5670 UInt nn = INSN(9,5); in dis_ARM64_load_store()
5671 UInt tt = INSN(4,0); in dis_ARM64_load_store()
5876 if (INSN(31,31) == 0 && INSN(29,24) == BITS6(0,0,1,1,0,0) in dis_ARM64_load_store()
5877 && INSN(21,21) == 0) { in dis_ARM64_load_store()
5878 Bool bitQ = INSN(30,30); in dis_ARM64_load_store()
5879 Bool isPX = INSN(23,23) == 1; in dis_ARM64_load_store()
5880 Bool isLD = INSN(22,22) == 1; in dis_ARM64_load_store()
5881 UInt mm = INSN(20,16); in dis_ARM64_load_store()
5882 UInt opc = INSN(15,12); in dis_ARM64_load_store()
5883 UInt sz = INSN(11,10); in dis_ARM64_load_store()
5884 UInt nn = INSN(9,5); in dis_ARM64_load_store()
5885 UInt tt = INSN(4,0); in dis_ARM64_load_store()
6054 if (INSN(31,31) == 0 && INSN(29,24) == BITS6(0,0,1,1,0,1) in dis_ARM64_load_store()
6055 && INSN(22,22) == 1 && INSN(15,14) == BITS2(1,1) in dis_ARM64_load_store()
6056 && INSN(12,12) == 0) { in dis_ARM64_load_store()
6057 UInt bitQ = INSN(30,30); in dis_ARM64_load_store()
6058 Bool isPX = INSN(23,23) == 1; in dis_ARM64_load_store()
6059 UInt nRegs = ((INSN(13,13) << 1) | INSN(21,21)) + 1; in dis_ARM64_load_store()
6060 UInt mm = INSN(20,16); in dis_ARM64_load_store()
6061 UInt sz = INSN(11,10); in dis_ARM64_load_store()
6062 UInt nn = INSN(9,5); in dis_ARM64_load_store()
6063 UInt tt = INSN(4,0); in dis_ARM64_load_store()
6171 if (INSN(31,31) == 0 && INSN(29,24) == BITS6(0,0,1,1,0,1)) { in dis_ARM64_load_store()
6172 UInt bitQ = INSN(30,30); in dis_ARM64_load_store()
6173 Bool isPX = INSN(23,23) == 1; in dis_ARM64_load_store()
6174 Bool isLD = INSN(22,22) == 1; in dis_ARM64_load_store()
6175 UInt nRegs = ((INSN(13,13) << 1) | INSN(21,21)) + 1; in dis_ARM64_load_store()
6176 UInt mm = INSN(20,16); in dis_ARM64_load_store()
6177 UInt xx = INSN(15,14); in dis_ARM64_load_store()
6178 UInt bitS = INSN(12,12); in dis_ARM64_load_store()
6179 UInt sz = INSN(11,10); in dis_ARM64_load_store()
6180 UInt nn = INSN(9,5); in dis_ARM64_load_store()
6181 UInt tt = INSN(4,0); in dis_ARM64_load_store()
6310 if (INSN(29,23) == BITS7(0,0,1,0,0,0,0) in dis_ARM64_load_store()
6311 && (INSN(23,21) & BITS3(1,0,1)) == BITS3(0,0,0) in dis_ARM64_load_store()
6312 && INSN(14,10) == BITS5(1,1,1,1,1)) { in dis_ARM64_load_store()
6313 UInt szBlg2 = INSN(31,30); in dis_ARM64_load_store()
6314 Bool isLD = INSN(22,22) == 1; in dis_ARM64_load_store()
6315 Bool isAcqOrRel = INSN(15,15) == 1; in dis_ARM64_load_store()
6316 UInt ss = INSN(20,16); in dis_ARM64_load_store()
6317 UInt nn = INSN(9,5); in dis_ARM64_load_store()
6318 UInt tt = INSN(4,0); in dis_ARM64_load_store()
6365 if (INSN(29,23) == BITS7(0,0,1,0,0,0,1) in dis_ARM64_load_store()
6366 && INSN(21,10) == BITS12(0,1,1,1,1,1,1,1,1,1,1,1)) { in dis_ARM64_load_store()
6367 UInt szBlg2 = INSN(31,30); in dis_ARM64_load_store()
6368 Bool isLD = INSN(22,22) == 1; in dis_ARM64_load_store()
6369 UInt nn = INSN(9,5); in dis_ARM64_load_store()
6370 UInt tt = INSN(4,0); in dis_ARM64_load_store()
6402 if (INSN(31,22) == BITS10(1,1,1,1,1,0,0,1,1,0)) { in dis_ARM64_load_store()
6403 UInt imm12 = INSN(21,10); in dis_ARM64_load_store()
6404 UInt nn = INSN(9,5); in dis_ARM64_load_store()
6405 UInt tt = INSN(4,0); in dis_ARM64_load_store()
6416 # undef INSN in dis_ARM64_load_store()
6428 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_ARM64_branch_etc() macro
6433 if (INSN(31,24) == BITS8(0,1,0,1,0,1,0,0) && INSN(4,4) == 0) { in dis_ARM64_branch_etc()
6434 UInt cond = INSN(3,0); in dis_ARM64_branch_etc()
6435 ULong uimm64 = INSN(23,5) << 2; in dis_ARM64_branch_etc()
6453 if (INSN(30,26) == BITS5(0,0,1,0,1)) { in dis_ARM64_branch_etc()
6457 UInt bLink = INSN(31,31); in dis_ARM64_branch_etc()
6458 ULong uimm64 = INSN(25,0) << 2; in dis_ARM64_branch_etc()
6477 if (INSN(31,23) == BITS9(1,1,0,1,0,1,1,0,0) in dis_ARM64_branch_etc()
6478 && INSN(20,16) == BITS5(1,1,1,1,1) in dis_ARM64_branch_etc()
6479 && INSN(15,10) == BITS6(0,0,0,0,0,0) in dis_ARM64_branch_etc()
6480 && INSN(4,0) == BITS5(0,0,0,0,0)) { in dis_ARM64_branch_etc()
6481 UInt branch_type = INSN(22,21); in dis_ARM64_branch_etc()
6482 UInt nn = INSN(9,5); in dis_ARM64_branch_etc()
6513 if (INSN(30,25) == BITS6(0,1,1,0,1,0)) { in dis_ARM64_branch_etc()
6514 Bool is64 = INSN(31,31) == 1; in dis_ARM64_branch_etc()
6515 Bool bIfZ = INSN(24,24) == 0; in dis_ARM64_branch_etc()
6516 ULong uimm64 = INSN(23,5) << 2; in dis_ARM64_branch_etc()
6517 UInt rT = INSN(4,0); in dis_ARM64_branch_etc()
6545 if (INSN(30,25) == BITS6(0,1,1,0,1,1)) { in dis_ARM64_branch_etc()
6546 UInt b5 = INSN(31,31); in dis_ARM64_branch_etc()
6547 Bool bIfZ = INSN(24,24) == 0; in dis_ARM64_branch_etc()
6548 UInt b40 = INSN(23,19); in dis_ARM64_branch_etc()
6549 UInt imm14 = INSN(18,5); in dis_ARM64_branch_etc()
6550 UInt tt = INSN(4,0); in dis_ARM64_branch_etc()
6577 if (INSN(31,0) == 0xD4000001) { in dis_ARM64_branch_etc()
6590 if ( (INSN(31,0) & 0xFFFFFFE0) == 0xD51BD040 /*MSR*/ in dis_ARM64_branch_etc()
6591 || (INSN(31,0) & 0xFFFFFFE0) == 0xD53BD040 /*MRS*/) { in dis_ARM64_branch_etc()
6592 Bool toSys = INSN(21,21) == 0; in dis_ARM64_branch_etc()
6593 UInt tt = INSN(4,0); in dis_ARM64_branch_etc()
6607 if ( (INSN(31,0) & 0xFFFFFFE0) == 0xD51B4400 /*MSR*/ in dis_ARM64_branch_etc()
6608 || (INSN(31,0) & 0xFFFFFFE0) == 0xD53B4400 /*MRS*/) { in dis_ARM64_branch_etc()
6609 Bool toSys = INSN(21,21) == 0; in dis_ARM64_branch_etc()
6610 UInt tt = INSN(4,0); in dis_ARM64_branch_etc()
6626 if ( (INSN(31,0) & 0xFFFFFFE0) == 0xD51B4420 /*MSR*/ in dis_ARM64_branch_etc()
6627 || (INSN(31,0) & 0xFFFFFFE0) == 0xD53B4420 /*MRS*/) { in dis_ARM64_branch_etc()
6628 Bool toSys = INSN(21,21) == 0; in dis_ARM64_branch_etc()
6629 UInt tt = INSN(4,0); in dis_ARM64_branch_etc()
6665 if ( (INSN(31,0) & 0xFFFFFFE0) == 0xD51B4200 /*MSR*/ in dis_ARM64_branch_etc()
6666 || (INSN(31,0) & 0xFFFFFFE0) == 0xD53B4200 /*MRS*/) { in dis_ARM64_branch_etc()
6667 Bool toSys = INSN(21,21) == 0; in dis_ARM64_branch_etc()
6668 UInt tt = INSN(4,0); in dis_ARM64_branch_etc()
6688 if ((INSN(31,0) & 0xFFFFFFE0) == 0xD53B00E0) { in dis_ARM64_branch_etc()
6689 UInt tt = INSN(4,0); in dis_ARM64_branch_etc()
6701 if ((INSN(31,0) & 0xFFFFFFE0) == 0xD53B0020) { in dis_ARM64_branch_etc()
6702 UInt tt = INSN(4,0); in dis_ARM64_branch_etc()
6725 if ((INSN(31,0) & 0xFFFFFFE0) == 0xD53BE040) { in dis_ARM64_branch_etc()
6726 UInt tt = INSN(4,0); in dis_ARM64_branch_etc()
6746 if ((INSN(31,0) & 0xFFFFFFE0) == 0xD50B7520) { in dis_ARM64_branch_etc()
6752 UInt tt = INSN(4,0); in dis_ARM64_branch_etc()
6774 if ((INSN(31,0) & 0xFFFFFFE0) == 0xD50B7B20) { in dis_ARM64_branch_etc()
6783 UInt tt = INSN(4,0); in dis_ARM64_branch_etc()
6808 if (INSN(31,22) == BITS10(1,1,0,1,0,1,0,1,0,0) in dis_ARM64_branch_etc()
6809 && INSN(21,12) == BITS10(0,0,0,0,1,1,0,0,1,1) in dis_ARM64_branch_etc()
6810 && INSN(7,7) == 1 in dis_ARM64_branch_etc()
6811 && INSN(6,5) <= BITS2(1,0) && INSN(4,0) == BITS5(1,1,1,1,1)) { in dis_ARM64_branch_etc()
6812 UInt opc = INSN(6,5); in dis_ARM64_branch_etc()
6813 UInt CRm = INSN(11,8); in dis_ARM64_branch_etc()
6826 if (INSN(31,0) == 0xD503201F) { in dis_ARM64_branch_etc()
6835 if (INSN(31,24) == BITS8(1,1,0,1,0,1,0,0) in dis_ARM64_branch_etc()
6836 && INSN(23,21) == BITS3(0,0,1) && INSN(4,0) == BITS5(0,0,0,0,0)) { in dis_ARM64_branch_etc()
6837 UInt imm16 = INSN(20,5); in dis_ARM64_branch_etc()
6849 # undef INSN in dis_ARM64_branch_etc()
8175 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_AdvSIMD_EXT() macro
8176 if (INSN(31,31) != 0 in dis_AdvSIMD_EXT()
8177 || INSN(29,24) != BITS6(1,0,1,1,1,0) in dis_AdvSIMD_EXT()
8178 || INSN(21,21) != 0 || INSN(15,15) != 0 || INSN(10,10) != 0) { in dis_AdvSIMD_EXT()
8181 UInt bitQ = INSN(30,30); in dis_AdvSIMD_EXT()
8182 UInt op2 = INSN(23,22); in dis_AdvSIMD_EXT()
8183 UInt mm = INSN(20,16); in dis_AdvSIMD_EXT()
8184 UInt imm4 = INSN(14,11); in dis_AdvSIMD_EXT()
8185 UInt nn = INSN(9,5); in dis_AdvSIMD_EXT()
8186 UInt dd = INSN(4,0); in dis_AdvSIMD_EXT()
8224 # undef INSN in dis_AdvSIMD_EXT()
8235 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_AdvSIMD_TBL_TBX() macro
8236 if (INSN(31,31) != 0 in dis_AdvSIMD_TBL_TBX()
8237 || INSN(29,24) != BITS6(0,0,1,1,1,0) in dis_AdvSIMD_TBL_TBX()
8238 || INSN(21,21) != 0 in dis_AdvSIMD_TBL_TBX()
8239 || INSN(15,15) != 0 in dis_AdvSIMD_TBL_TBX()
8240 || INSN(11,10) != BITS2(0,0)) { in dis_AdvSIMD_TBL_TBX()
8243 UInt bitQ = INSN(30,30); in dis_AdvSIMD_TBL_TBX()
8244 UInt op2 = INSN(23,22); in dis_AdvSIMD_TBL_TBX()
8245 UInt mm = INSN(20,16); in dis_AdvSIMD_TBL_TBX()
8246 UInt len = INSN(14,13); in dis_AdvSIMD_TBL_TBX()
8247 UInt bitOP = INSN(12,12); in dis_AdvSIMD_TBL_TBX()
8248 UInt nn = INSN(9,5); in dis_AdvSIMD_TBL_TBX()
8249 UInt dd = INSN(4,0); in dis_AdvSIMD_TBL_TBX()
8283 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_AdvSIMD_TBL_TBX() macro
8285 # undef INSN in dis_AdvSIMD_TBL_TBX()
8296 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_AdvSIMD_ZIP_UZP_TRN() macro
8297 if (INSN(31,31) != 0 in dis_AdvSIMD_ZIP_UZP_TRN()
8298 || INSN(29,24) != BITS6(0,0,1,1,1,0) in dis_AdvSIMD_ZIP_UZP_TRN()
8299 || INSN(21,21) != 0 || INSN(15,15) != 0 || INSN(11,10) != BITS2(1,0)) { in dis_AdvSIMD_ZIP_UZP_TRN()
8302 UInt bitQ = INSN(30,30); in dis_AdvSIMD_ZIP_UZP_TRN()
8303 UInt size = INSN(23,22); in dis_AdvSIMD_ZIP_UZP_TRN()
8304 UInt mm = INSN(20,16); in dis_AdvSIMD_ZIP_UZP_TRN()
8305 UInt opcode = INSN(14,12); in dis_AdvSIMD_ZIP_UZP_TRN()
8306 UInt nn = INSN(9,5); in dis_AdvSIMD_ZIP_UZP_TRN()
8307 UInt dd = INSN(4,0); in dis_AdvSIMD_ZIP_UZP_TRN()
8393 # undef INSN in dis_AdvSIMD_ZIP_UZP_TRN()
8404 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_AdvSIMD_across_lanes() macro
8405 if (INSN(31,31) != 0 in dis_AdvSIMD_across_lanes()
8406 || INSN(28,24) != BITS5(0,1,1,1,0) in dis_AdvSIMD_across_lanes()
8407 || INSN(21,17) != BITS5(1,1,0,0,0) || INSN(11,10) != BITS2(1,0)) { in dis_AdvSIMD_across_lanes()
8410 UInt bitQ = INSN(30,30); in dis_AdvSIMD_across_lanes()
8411 UInt bitU = INSN(29,29); in dis_AdvSIMD_across_lanes()
8412 UInt size = INSN(23,22); in dis_AdvSIMD_across_lanes()
8413 UInt opcode = INSN(16,12); in dis_AdvSIMD_across_lanes()
8414 UInt nn = INSN(9,5); in dis_AdvSIMD_across_lanes()
8415 UInt dd = INSN(4,0); in dis_AdvSIMD_across_lanes()
8533 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_AdvSIMD_across_lanes() macro
8535 # undef INSN in dis_AdvSIMD_across_lanes()
8546 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_AdvSIMD_copy() macro
8547 if (INSN(31,31) != 0 in dis_AdvSIMD_copy()
8548 || INSN(28,21) != BITS8(0,1,1,1,0,0,0,0) in dis_AdvSIMD_copy()
8549 || INSN(15,15) != 0 || INSN(10,10) != 1) { in dis_AdvSIMD_copy()
8552 UInt bitQ = INSN(30,30); in dis_AdvSIMD_copy()
8553 UInt bitOP = INSN(29,29); in dis_AdvSIMD_copy()
8554 UInt imm5 = INSN(20,16); in dis_AdvSIMD_copy()
8555 UInt imm4 = INSN(14,11); in dis_AdvSIMD_copy()
8556 UInt nn = INSN(9,5); in dis_AdvSIMD_copy()
8557 UInt dd = INSN(4,0); in dis_AdvSIMD_copy()
8823 # undef INSN in dis_AdvSIMD_copy()
8835 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_AdvSIMD_modified_immediate() macro
8836 if (INSN(31,31) != 0 in dis_AdvSIMD_modified_immediate()
8837 || INSN(28,19) != BITS10(0,1,1,1,1,0,0,0,0,0) in dis_AdvSIMD_modified_immediate()
8838 || INSN(11,10) != BITS2(0,1)) { in dis_AdvSIMD_modified_immediate()
8841 UInt bitQ = INSN(30,30); in dis_AdvSIMD_modified_immediate()
8842 UInt bitOP = INSN(29,29); in dis_AdvSIMD_modified_immediate()
8843 UInt cmode = INSN(15,12); in dis_AdvSIMD_modified_immediate()
8844 UInt abcdefgh = (INSN(18,16) << 5) | INSN(9,5); in dis_AdvSIMD_modified_immediate()
8845 UInt dd = INSN(4,0); in dis_AdvSIMD_modified_immediate()
8974 # undef INSN in dis_AdvSIMD_modified_immediate()
8985 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_AdvSIMD_scalar_copy() macro
8986 if (INSN(31,30) != BITS2(0,1) in dis_AdvSIMD_scalar_copy()
8987 || INSN(28,21) != BITS8(1,1,1,1,0,0,0,0) in dis_AdvSIMD_scalar_copy()
8988 || INSN(15,15) != 0 || INSN(10,10) != 1) { in dis_AdvSIMD_scalar_copy()
8991 UInt bitOP = INSN(29,29); in dis_AdvSIMD_scalar_copy()
8992 UInt imm5 = INSN(20,16); in dis_AdvSIMD_scalar_copy()
8993 UInt imm4 = INSN(14,11); in dis_AdvSIMD_scalar_copy()
8994 UInt nn = INSN(9,5); in dis_AdvSIMD_scalar_copy()
8995 UInt dd = INSN(4,0); in dis_AdvSIMD_scalar_copy()
9042 # undef INSN in dis_AdvSIMD_scalar_copy()
9053 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_AdvSIMD_scalar_pairwise() macro
9054 if (INSN(31,30) != BITS2(0,1) in dis_AdvSIMD_scalar_pairwise()
9055 || INSN(28,24) != BITS5(1,1,1,1,0) in dis_AdvSIMD_scalar_pairwise()
9056 || INSN(21,17) != BITS5(1,1,0,0,0) in dis_AdvSIMD_scalar_pairwise()
9057 || INSN(11,10) != BITS2(1,0)) { in dis_AdvSIMD_scalar_pairwise()
9060 UInt bitU = INSN(29,29); in dis_AdvSIMD_scalar_pairwise()
9061 UInt sz = INSN(23,22); in dis_AdvSIMD_scalar_pairwise()
9062 UInt opcode = INSN(16,12); in dis_AdvSIMD_scalar_pairwise()
9063 UInt nn = INSN(9,5); in dis_AdvSIMD_scalar_pairwise()
9064 UInt dd = INSN(4,0); in dis_AdvSIMD_scalar_pairwise()
9126 # undef INSN in dis_AdvSIMD_scalar_pairwise()
9137 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_AdvSIMD_scalar_shift_by_imm() macro
9138 if (INSN(31,30) != BITS2(0,1) in dis_AdvSIMD_scalar_shift_by_imm()
9139 || INSN(28,23) != BITS6(1,1,1,1,1,0) || INSN(10,10) != 1) { in dis_AdvSIMD_scalar_shift_by_imm()
9142 UInt bitU = INSN(29,29); in dis_AdvSIMD_scalar_shift_by_imm()
9143 UInt immh = INSN(22,19); in dis_AdvSIMD_scalar_shift_by_imm()
9144 UInt immb = INSN(18,16); in dis_AdvSIMD_scalar_shift_by_imm()
9145 UInt opcode = INSN(15,11); in dis_AdvSIMD_scalar_shift_by_imm()
9146 UInt nn = INSN(9,5); in dis_AdvSIMD_scalar_shift_by_imm()
9147 UInt dd = INSN(4,0); in dis_AdvSIMD_scalar_shift_by_imm()
9433 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_AdvSIMD_scalar_shift_by_imm() macro
9435 # undef INSN in dis_AdvSIMD_scalar_shift_by_imm()
9446 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_AdvSIMD_scalar_three_different() macro
9447 if (INSN(31,30) != BITS2(0,1) in dis_AdvSIMD_scalar_three_different()
9448 || INSN(28,24) != BITS5(1,1,1,1,0) in dis_AdvSIMD_scalar_three_different()
9449 || INSN(21,21) != 1 in dis_AdvSIMD_scalar_three_different()
9450 || INSN(11,10) != BITS2(0,0)) { in dis_AdvSIMD_scalar_three_different()
9453 UInt bitU = INSN(29,29); in dis_AdvSIMD_scalar_three_different()
9454 UInt size = INSN(23,22); in dis_AdvSIMD_scalar_three_different()
9455 UInt mm = INSN(20,16); in dis_AdvSIMD_scalar_three_different()
9456 UInt opcode = INSN(15,12); in dis_AdvSIMD_scalar_three_different()
9457 UInt nn = INSN(9,5); in dis_AdvSIMD_scalar_three_different()
9458 UInt dd = INSN(4,0); in dis_AdvSIMD_scalar_three_different()
9504 # undef INSN in dis_AdvSIMD_scalar_three_different()
9515 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_AdvSIMD_scalar_three_same() macro
9516 if (INSN(31,30) != BITS2(0,1) in dis_AdvSIMD_scalar_three_same()
9517 || INSN(28,24) != BITS5(1,1,1,1,0) in dis_AdvSIMD_scalar_three_same()
9518 || INSN(21,21) != 1 in dis_AdvSIMD_scalar_three_same()
9519 || INSN(10,10) != 1) { in dis_AdvSIMD_scalar_three_same()
9522 UInt bitU = INSN(29,29); in dis_AdvSIMD_scalar_three_same()
9523 UInt size = INSN(23,22); in dis_AdvSIMD_scalar_three_same()
9524 UInt mm = INSN(20,16); in dis_AdvSIMD_scalar_three_same()
9525 UInt opcode = INSN(15,11); in dis_AdvSIMD_scalar_three_same()
9526 UInt nn = INSN(9,5); in dis_AdvSIMD_scalar_three_same()
9527 UInt dd = INSN(4,0); in dis_AdvSIMD_scalar_three_same()
9811 # undef INSN in dis_AdvSIMD_scalar_three_same()
9822 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_AdvSIMD_scalar_two_reg_misc() macro
9823 if (INSN(31,30) != BITS2(0,1) in dis_AdvSIMD_scalar_two_reg_misc()
9824 || INSN(28,24) != BITS5(1,1,1,1,0) in dis_AdvSIMD_scalar_two_reg_misc()
9825 || INSN(21,17) != BITS5(1,0,0,0,0) in dis_AdvSIMD_scalar_two_reg_misc()
9826 || INSN(11,10) != BITS2(1,0)) { in dis_AdvSIMD_scalar_two_reg_misc()
9829 UInt bitU = INSN(29,29); in dis_AdvSIMD_scalar_two_reg_misc()
9830 UInt size = INSN(23,22); in dis_AdvSIMD_scalar_two_reg_misc()
9831 UInt opcode = INSN(16,12); in dis_AdvSIMD_scalar_two_reg_misc()
9832 UInt nn = INSN(9,5); in dis_AdvSIMD_scalar_two_reg_misc()
9833 UInt dd = INSN(4,0); in dis_AdvSIMD_scalar_two_reg_misc()
10126 # undef INSN in dis_AdvSIMD_scalar_two_reg_misc()
10139 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_AdvSIMD_scalar_x_indexed_element() macro
10140 if (INSN(31,30) != BITS2(0,1) in dis_AdvSIMD_scalar_x_indexed_element()
10141 || INSN(28,24) != BITS5(1,1,1,1,1) || INSN(10,10) !=0) { in dis_AdvSIMD_scalar_x_indexed_element()
10144 UInt bitU = INSN(29,29); in dis_AdvSIMD_scalar_x_indexed_element()
10145 UInt size = INSN(23,22); in dis_AdvSIMD_scalar_x_indexed_element()
10146 UInt bitL = INSN(21,21); in dis_AdvSIMD_scalar_x_indexed_element()
10147 UInt bitM = INSN(20,20); in dis_AdvSIMD_scalar_x_indexed_element()
10148 UInt mmLO4 = INSN(19,16); in dis_AdvSIMD_scalar_x_indexed_element()
10149 UInt opcode = INSN(15,12); in dis_AdvSIMD_scalar_x_indexed_element()
10150 UInt bitH = INSN(11,11); in dis_AdvSIMD_scalar_x_indexed_element()
10151 UInt nn = INSN(9,5); in dis_AdvSIMD_scalar_x_indexed_element()
10152 UInt dd = INSN(4,0); in dis_AdvSIMD_scalar_x_indexed_element()
10310 # undef INSN in dis_AdvSIMD_scalar_x_indexed_element()
10321 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_AdvSIMD_shift_by_immediate() macro
10322 if (INSN(31,31) != 0 in dis_AdvSIMD_shift_by_immediate()
10323 || INSN(28,23) != BITS6(0,1,1,1,1,0) || INSN(10,10) != 1) { in dis_AdvSIMD_shift_by_immediate()
10326 UInt bitQ = INSN(30,30); in dis_AdvSIMD_shift_by_immediate()
10327 UInt bitU = INSN(29,29); in dis_AdvSIMD_shift_by_immediate()
10328 UInt immh = INSN(22,19); in dis_AdvSIMD_shift_by_immediate()
10329 UInt immb = INSN(18,16); in dis_AdvSIMD_shift_by_immediate()
10330 UInt opcode = INSN(15,11); in dis_AdvSIMD_shift_by_immediate()
10331 UInt nn = INSN(9,5); in dis_AdvSIMD_shift_by_immediate()
10332 UInt dd = INSN(4,0); in dis_AdvSIMD_shift_by_immediate()
10802 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_AdvSIMD_shift_by_immediate() macro
10804 # undef INSN in dis_AdvSIMD_shift_by_immediate()
10815 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_AdvSIMD_three_different() macro
10816 if (INSN(31,31) != 0 in dis_AdvSIMD_three_different()
10817 || INSN(28,24) != BITS5(0,1,1,1,0) in dis_AdvSIMD_three_different()
10818 || INSN(21,21) != 1 in dis_AdvSIMD_three_different()
10819 || INSN(11,10) != BITS2(0,0)) { in dis_AdvSIMD_three_different()
10822 UInt bitQ = INSN(30,30); in dis_AdvSIMD_three_different()
10823 UInt bitU = INSN(29,29); in dis_AdvSIMD_three_different()
10824 UInt size = INSN(23,22); in dis_AdvSIMD_three_different()
10825 UInt mm = INSN(20,16); in dis_AdvSIMD_three_different()
10826 UInt opcode = INSN(15,12); in dis_AdvSIMD_three_different()
10827 UInt nn = INSN(9,5); in dis_AdvSIMD_three_different()
10828 UInt dd = INSN(4,0); in dis_AdvSIMD_three_different()
11047 # undef INSN in dis_AdvSIMD_three_different()
11058 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_AdvSIMD_three_same() macro
11059 if (INSN(31,31) != 0 in dis_AdvSIMD_three_same()
11060 || INSN(28,24) != BITS5(0,1,1,1,0) in dis_AdvSIMD_three_same()
11061 || INSN(21,21) != 1 in dis_AdvSIMD_three_same()
11062 || INSN(10,10) != 1) { in dis_AdvSIMD_three_same()
11065 UInt bitQ = INSN(30,30); in dis_AdvSIMD_three_same()
11066 UInt bitU = INSN(29,29); in dis_AdvSIMD_three_same()
11067 UInt size = INSN(23,22); in dis_AdvSIMD_three_same()
11068 UInt mm = INSN(20,16); in dis_AdvSIMD_three_same()
11069 UInt opcode = INSN(15,11); in dis_AdvSIMD_three_same()
11070 UInt nn = INSN(9,5); in dis_AdvSIMD_three_same()
11071 UInt dd = INSN(4,0); in dis_AdvSIMD_three_same()
11185 DIP("%s %s.%s, %s.%s, %s.%s\n", names[INSN(23,22)], in dis_AdvSIMD_three_same()
11784 # undef INSN in dis_AdvSIMD_three_same()
11795 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_AdvSIMD_two_reg_misc() macro
11796 if (INSN(31,31) != 0 in dis_AdvSIMD_two_reg_misc()
11797 || INSN(28,24) != BITS5(0,1,1,1,0) in dis_AdvSIMD_two_reg_misc()
11798 || INSN(21,17) != BITS5(1,0,0,0,0) in dis_AdvSIMD_two_reg_misc()
11799 || INSN(11,10) != BITS2(1,0)) { in dis_AdvSIMD_two_reg_misc()
11802 UInt bitQ = INSN(30,30); in dis_AdvSIMD_two_reg_misc()
11803 UInt bitU = INSN(29,29); in dis_AdvSIMD_two_reg_misc()
11804 UInt size = INSN(23,22); in dis_AdvSIMD_two_reg_misc()
11805 UInt opcode = INSN(16,12); in dis_AdvSIMD_two_reg_misc()
11806 UInt nn = INSN(9,5); in dis_AdvSIMD_two_reg_misc()
11807 UInt dd = INSN(4,0); in dis_AdvSIMD_two_reg_misc()
12456 # undef INSN in dis_AdvSIMD_two_reg_misc()
12469 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_AdvSIMD_vector_x_indexed_elem() macro
12470 if (INSN(31,31) != 0 in dis_AdvSIMD_vector_x_indexed_elem()
12471 || INSN(28,24) != BITS5(0,1,1,1,1) || INSN(10,10) !=0) { in dis_AdvSIMD_vector_x_indexed_elem()
12474 UInt bitQ = INSN(30,30); in dis_AdvSIMD_vector_x_indexed_elem()
12475 UInt bitU = INSN(29,29); in dis_AdvSIMD_vector_x_indexed_elem()
12476 UInt size = INSN(23,22); in dis_AdvSIMD_vector_x_indexed_elem()
12477 UInt bitL = INSN(21,21); in dis_AdvSIMD_vector_x_indexed_elem()
12478 UInt bitM = INSN(20,20); in dis_AdvSIMD_vector_x_indexed_elem()
12479 UInt mmLO4 = INSN(19,16); in dis_AdvSIMD_vector_x_indexed_elem()
12480 UInt opcode = INSN(15,12); in dis_AdvSIMD_vector_x_indexed_elem()
12481 UInt bitH = INSN(11,11); in dis_AdvSIMD_vector_x_indexed_elem()
12482 UInt nn = INSN(9,5); in dis_AdvSIMD_vector_x_indexed_elem()
12483 UInt dd = INSN(4,0); in dis_AdvSIMD_vector_x_indexed_elem()
12747 # undef INSN in dis_AdvSIMD_vector_x_indexed_elem()
12754 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_AdvSIMD_crypto_aes() macro
12756 # undef INSN in dis_AdvSIMD_crypto_aes()
12763 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_AdvSIMD_crypto_three_reg_sha() macro
12765 # undef INSN in dis_AdvSIMD_crypto_three_reg_sha()
12772 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_AdvSIMD_crypto_two_reg_sha() macro
12774 # undef INSN in dis_AdvSIMD_crypto_two_reg_sha()
12786 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_AdvSIMD_fp_compare() macro
12787 if (INSN(31,24) != BITS8(0,0,0,1,1,1,1,0) in dis_AdvSIMD_fp_compare()
12788 || INSN(21,21) != 1 || INSN(13,10) != BITS4(1,0,0,0)) { in dis_AdvSIMD_fp_compare()
12791 UInt ty = INSN(23,22); in dis_AdvSIMD_fp_compare()
12792 UInt mm = INSN(20,16); in dis_AdvSIMD_fp_compare()
12793 UInt op = INSN(15,14); in dis_AdvSIMD_fp_compare()
12794 UInt nn = INSN(9,5); in dis_AdvSIMD_fp_compare()
12795 UInt opcode2 = INSN(4,0); in dis_AdvSIMD_fp_compare()
12849 # undef INSN in dis_AdvSIMD_fp_compare()
12861 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_AdvSIMD_fp_conditional_compare() macro
12862 if (INSN(31,24) != BITS8(0,0,0,1,1,1,1,0) in dis_AdvSIMD_fp_conditional_compare()
12863 || INSN(21,21) != 1 || INSN(11,10) != BITS2(0,1)) { in dis_AdvSIMD_fp_conditional_compare()
12866 UInt ty = INSN(23,22); in dis_AdvSIMD_fp_conditional_compare()
12867 UInt mm = INSN(20,16); in dis_AdvSIMD_fp_conditional_compare()
12868 UInt cond = INSN(15,12); in dis_AdvSIMD_fp_conditional_compare()
12869 UInt nn = INSN(9,5); in dis_AdvSIMD_fp_conditional_compare()
12870 UInt op = INSN(4,4); in dis_AdvSIMD_fp_conditional_compare()
12871 UInt nzcv = INSN(3,0); in dis_AdvSIMD_fp_conditional_compare()
12914 # undef INSN in dis_AdvSIMD_fp_conditional_compare()
12926 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_AdvSIMD_fp_conditional_select() macro
12927 if (INSN(31,24) != BITS8(0,0,0,1,1,1,1,0) || INSN(21,21) != 1 in dis_AdvSIMD_fp_conditional_select()
12928 || INSN(11,10) != BITS2(1,1)) { in dis_AdvSIMD_fp_conditional_select()
12931 UInt ty = INSN(23,22); in dis_AdvSIMD_fp_conditional_select()
12932 UInt mm = INSN(20,16); in dis_AdvSIMD_fp_conditional_select()
12933 UInt cond = INSN(15,12); in dis_AdvSIMD_fp_conditional_select()
12934 UInt nn = INSN(9,5); in dis_AdvSIMD_fp_conditional_select()
12935 UInt dd = INSN(4,0); in dis_AdvSIMD_fp_conditional_select()
12956 # undef INSN in dis_AdvSIMD_fp_conditional_select()
12968 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_AdvSIMD_fp_data_proc_1_source() macro
12969 if (INSN(31,24) != BITS8(0,0,0,1,1,1,1,0) in dis_AdvSIMD_fp_data_proc_1_source()
12970 || INSN(21,21) != 1 || INSN(14,10) != BITS5(1,0,0,0,0)) { in dis_AdvSIMD_fp_data_proc_1_source()
12973 UInt ty = INSN(23,22); in dis_AdvSIMD_fp_data_proc_1_source()
12974 UInt opcode = INSN(20,15); in dis_AdvSIMD_fp_data_proc_1_source()
12975 UInt nn = INSN(9,5); in dis_AdvSIMD_fp_data_proc_1_source()
12976 UInt dd = INSN(4,0); in dis_AdvSIMD_fp_data_proc_1_source()
13150 # undef INSN in dis_AdvSIMD_fp_data_proc_1_source()
13162 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_AdvSIMD_fp_data_proc_2_source() macro
13163 if (INSN(31,24) != BITS8(0,0,0,1,1,1,1,0) in dis_AdvSIMD_fp_data_proc_2_source()
13164 || INSN(21,21) != 1 || INSN(11,10) != BITS2(1,0)) { in dis_AdvSIMD_fp_data_proc_2_source()
13167 UInt ty = INSN(23,22); in dis_AdvSIMD_fp_data_proc_2_source()
13168 UInt mm = INSN(20,16); in dis_AdvSIMD_fp_data_proc_2_source()
13169 UInt opcode = INSN(15,12); in dis_AdvSIMD_fp_data_proc_2_source()
13170 UInt nn = INSN(9,5); in dis_AdvSIMD_fp_data_proc_2_source()
13171 UInt dd = INSN(4,0); in dis_AdvSIMD_fp_data_proc_2_source()
13231 # undef INSN in dis_AdvSIMD_fp_data_proc_2_source()
13243 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_AdvSIMD_fp_data_proc_3_source() macro
13244 if (INSN(31,24) != BITS8(0,0,0,1,1,1,1,1)) { in dis_AdvSIMD_fp_data_proc_3_source()
13247 UInt ty = INSN(23,22); in dis_AdvSIMD_fp_data_proc_3_source()
13248 UInt bitO1 = INSN(21,21); in dis_AdvSIMD_fp_data_proc_3_source()
13249 UInt mm = INSN(20,16); in dis_AdvSIMD_fp_data_proc_3_source()
13250 UInt bitO0 = INSN(15,15); in dis_AdvSIMD_fp_data_proc_3_source()
13251 UInt aa = INSN(14,10); in dis_AdvSIMD_fp_data_proc_3_source()
13252 UInt nn = INSN(9,5); in dis_AdvSIMD_fp_data_proc_3_source()
13253 UInt dd = INSN(4,0); in dis_AdvSIMD_fp_data_proc_3_source()
13305 # undef INSN in dis_AdvSIMD_fp_data_proc_3_source()
13316 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_AdvSIMD_fp_immediate() macro
13317 if (INSN(31,24) != BITS8(0,0,0,1,1,1,1,0) in dis_AdvSIMD_fp_immediate()
13318 || INSN(21,21) != 1 || INSN(12,10) != BITS3(1,0,0)) { in dis_AdvSIMD_fp_immediate()
13321 UInt ty = INSN(23,22); in dis_AdvSIMD_fp_immediate()
13322 UInt imm8 = INSN(20,13); in dis_AdvSIMD_fp_immediate()
13323 UInt imm5 = INSN(9,5); in dis_AdvSIMD_fp_immediate()
13324 UInt dd = INSN(4,0); in dis_AdvSIMD_fp_immediate()
13342 # undef INSN in dis_AdvSIMD_fp_immediate()
13349 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_AdvSIMD_fp_to_from_fixedp_conv() macro
13355 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_AdvSIMD_fp_to_from_fixedp_conv() macro
13356 if (INSN(30,29) != BITS2(0,0) in dis_AdvSIMD_fp_to_from_fixedp_conv()
13357 || INSN(28,24) != BITS5(1,1,1,1,0) in dis_AdvSIMD_fp_to_from_fixedp_conv()
13358 || INSN(21,21) != 0) { in dis_AdvSIMD_fp_to_from_fixedp_conv()
13361 UInt bitSF = INSN(31,31); in dis_AdvSIMD_fp_to_from_fixedp_conv()
13362 UInt ty = INSN(23,22); // type in dis_AdvSIMD_fp_to_from_fixedp_conv()
13363 UInt rm = INSN(20,19); // rmode in dis_AdvSIMD_fp_to_from_fixedp_conv()
13364 UInt op = INSN(18,16); // opcode in dis_AdvSIMD_fp_to_from_fixedp_conv()
13365 UInt sc = INSN(15,10); // scale in dis_AdvSIMD_fp_to_from_fixedp_conv()
13366 UInt nn = INSN(9,5); in dis_AdvSIMD_fp_to_from_fixedp_conv()
13367 UInt dd = INSN(4,0); in dis_AdvSIMD_fp_to_from_fixedp_conv()
13463 # undef INSN in dis_AdvSIMD_fp_to_from_fixedp_conv()
13475 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in dis_AdvSIMD_fp_to_from_int_conv() macro
13476 if (INSN(30,29) != BITS2(0,0) in dis_AdvSIMD_fp_to_from_int_conv()
13477 || INSN(28,24) != BITS5(1,1,1,1,0) in dis_AdvSIMD_fp_to_from_int_conv()
13478 || INSN(21,21) != 1 in dis_AdvSIMD_fp_to_from_int_conv()
13479 || INSN(15,10) != BITS6(0,0,0,0,0,0)) { in dis_AdvSIMD_fp_to_from_int_conv()
13482 UInt bitSF = INSN(31,31); in dis_AdvSIMD_fp_to_from_int_conv()
13483 UInt ty = INSN(23,22); // type in dis_AdvSIMD_fp_to_from_int_conv()
13484 UInt rm = INSN(20,19); // rmode in dis_AdvSIMD_fp_to_from_int_conv()
13485 UInt op = INSN(18,16); // opcode in dis_AdvSIMD_fp_to_from_int_conv()
13486 UInt nn = INSN(9,5); in dis_AdvSIMD_fp_to_from_int_conv()
13487 UInt dd = INSN(4,0); in dis_AdvSIMD_fp_to_from_int_conv()
13713 # undef INSN in dis_AdvSIMD_fp_to_from_int_conv()
13808 # define INSN(_bMax,_bMin) SLICE_UInt(insn, (_bMax), (_bMin)) in disInstr_ARM64_WRK() macro
13925 switch (INSN(28,25)) { in disInstr_ARM64_WRK()
13966 # undef INSN in disInstr_ARM64_WRK()