Lines Matching refs:isQ

5672       Bool isQ   = bitQ == 1;  in dis_ARM64_load_store()  local
5673 Bool is1d = sz == BITS2(1,1) && !isQ; in dis_ARM64_load_store()
5692 UInt xferSzB = (isQ ? 16 : 8) * nRegs; in dis_ARM64_load_store()
5730 case 4: (isQ ? math_INTERLEAVE4_128 : math_INTERLEAVE4_64) in dis_ARM64_load_store()
5733 case 3: (isQ ? math_INTERLEAVE3_128 : math_INTERLEAVE3_64) in dis_ARM64_load_store()
5736 case 2: (isQ ? math_INTERLEAVE2_128 : math_INTERLEAVE2_64) in dis_ARM64_load_store()
5739 case 1: (isQ ? math_INTERLEAVE1_128 : math_INTERLEAVE1_64) in dis_ARM64_load_store()
5745 (isQ ? (_expr) : unop(Iop_V128to64,(_expr))) in dis_ARM64_load_store()
5746 UInt step = isQ ? 16 : 8; in dis_ARM64_load_store()
5767 UInt step = isQ ? 16 : 8; in dis_ARM64_load_store()
5768 IRType loadTy = isQ ? Ity_V128 : Ity_I64; in dis_ARM64_load_store()
5770 (isQ ? (_expr) : unop(Iop_64UtoV128,(_expr))) in dis_ARM64_load_store()
5801 case 4: (isQ ? math_DEINTERLEAVE4_128 : math_DEINTERLEAVE4_64) in dis_ARM64_load_store()
5804 case 3: (isQ ? math_DEINTERLEAVE3_128 : math_DEINTERLEAVE3_64) in dis_ARM64_load_store()
5807 case 2: (isQ ? math_DEINTERLEAVE2_128 : math_DEINTERLEAVE2_64) in dis_ARM64_load_store()
5810 case 1: (isQ ? math_DEINTERLEAVE1_128 : math_DEINTERLEAVE1_64) in dis_ARM64_load_store()
5886 Bool isQ = bitQ == 1; in dis_ARM64_load_store() local
5903 UInt xferSzB = (isQ ? 16 : 8) * nRegs; in dis_ARM64_load_store()
5941 (isQ ? (_expr) : unop(Iop_V128to64,(_expr))) in dis_ARM64_load_store()
5942 UInt step = isQ ? 16 : 8; in dis_ARM64_load_store()
5962 UInt step = isQ ? 16 : 8; in dis_ARM64_load_store()
5963 IRType loadTy = isQ ? Ity_V128 : Ity_I64; in dis_ARM64_load_store()
5965 (isQ ? (_expr) : unop(Iop_64UtoV128,(_expr))) in dis_ARM64_load_store()
8592 Bool isQ = bitQ == 1; in dis_AdvSIMD_copy() local
8597 arT = isQ ? "16b" : "8b"; in dis_AdvSIMD_copy()
8602 arT = isQ ? "8h" : "4h"; in dis_AdvSIMD_copy()
8607 arT = isQ ? "4s" : "2s"; in dis_AdvSIMD_copy()
8611 else if ((imm5 & 8) && isQ) { in dis_AdvSIMD_copy()
8623 isQ ? mkexpr(w1) : mkU64(0), mkexpr(w1))); in dis_AdvSIMD_copy()
10348 Bool isQ = bitQ == 1; in dis_AdvSIMD_shift_by_immediate() local
10374 UInt nLanes = (isQ ? 128 : 64) / lanebits; in dis_AdvSIMD_shift_by_immediate()
10397 Bool isQ = bitQ == 1; in dis_AdvSIMD_shift_by_immediate() local
10417 UInt nLanes = (isQ ? 128 : 64) / lanebits; in dis_AdvSIMD_shift_by_immediate()
10437 Bool isQ = bitQ == 1; in dis_AdvSIMD_shift_by_immediate() local
10459 UInt nLanes = (isQ ? 128 : 64) / lanebits; in dis_AdvSIMD_shift_by_immediate()
10479 Bool isQ = bitQ == 1; in dis_AdvSIMD_shift_by_immediate() local
10507 UInt nLanes = (isQ ? 128 : 64) / lanebits; in dis_AdvSIMD_shift_by_immediate()
10522 Bool isQ = bitQ == 1; in dis_AdvSIMD_shift_by_immediate() local
10544 isQ ? Iop_INVALID : Iop_ZeroHI64ofV128); in dis_AdvSIMD_shift_by_immediate()
10654 Bool isQ = bitQ == 1; in dis_AdvSIMD_shift_by_immediate() local
10672 tb = isQ ? "4s" : "2s"; in dis_AdvSIMD_shift_by_immediate()
10673 IRExpr* tmp = isQ ? mk_InterleaveHI32x4(src, zero) in dis_AdvSIMD_shift_by_immediate()
10681 tb = isQ ? "8h" : "4h"; in dis_AdvSIMD_shift_by_immediate()
10682 IRExpr* tmp = isQ ? mk_InterleaveHI16x8(src, zero) in dis_AdvSIMD_shift_by_immediate()
10690 tb = isQ ? "16b" : "8b"; in dis_AdvSIMD_shift_by_immediate()
10691 IRExpr* tmp = isQ ? mk_InterleaveHI8x16(src, zero) in dis_AdvSIMD_shift_by_immediate()
10702 isU ? 'u' : 's', isQ ? "2" : "", in dis_AdvSIMD_shift_by_immediate()
10723 Bool isQ = bitQ == 1; in dis_AdvSIMD_shift_by_immediate() local
10724 if (isD && !isQ) return False; /* reject .1d case */ in dis_AdvSIMD_shift_by_immediate()
10734 UInt nLanes = (isQ ? 2 : 1) * (isD ? 1 : 2); in dis_AdvSIMD_shift_by_immediate()
10746 if (!isQ) { in dis_AdvSIMD_shift_by_immediate()
10769 Bool isQ = bitQ == 1; in dis_AdvSIMD_shift_by_immediate() local
10770 if (isD && !isQ) return False; /* reject .1d case */ in dis_AdvSIMD_shift_by_immediate()
10780 UInt nLanes = (isQ ? 2 : 1) * (isD ? 1 : 2); in dis_AdvSIMD_shift_by_immediate()
10793 if (!isQ) { in dis_AdvSIMD_shift_by_immediate()
12394 Bool isQ = bitQ == 1; in dis_AdvSIMD_two_reg_misc() local
12397 if (isQ || !isF64) { in dis_AdvSIMD_two_reg_misc()
12403 isQ, isF64 ); in dis_AdvSIMD_two_reg_misc()