Lines Matching refs:vex_state
69 void LibVEX_GuestMIPS32_initialise( /*OUT*/ VexGuestMIPS32State * vex_state) in LibVEX_GuestMIPS32_initialise() argument
71 vex_state->guest_r0 = 0; /* Hardwired to 0 */ in LibVEX_GuestMIPS32_initialise()
72 vex_state->guest_r1 = 0; /* Assembler temporary */ in LibVEX_GuestMIPS32_initialise()
73 vex_state->guest_r2 = 0; /* Values for function returns ... */ in LibVEX_GuestMIPS32_initialise()
74 vex_state->guest_r3 = 0; /* ...and expression evaluation */ in LibVEX_GuestMIPS32_initialise()
75 vex_state->guest_r4 = 0; /* Function arguments */ in LibVEX_GuestMIPS32_initialise()
76 vex_state->guest_r5 = 0; in LibVEX_GuestMIPS32_initialise()
77 vex_state->guest_r6 = 0; in LibVEX_GuestMIPS32_initialise()
78 vex_state->guest_r7 = 0; in LibVEX_GuestMIPS32_initialise()
79 vex_state->guest_r8 = 0; /* Temporaries */ in LibVEX_GuestMIPS32_initialise()
80 vex_state->guest_r9 = 0; in LibVEX_GuestMIPS32_initialise()
81 vex_state->guest_r10 = 0; in LibVEX_GuestMIPS32_initialise()
82 vex_state->guest_r11 = 0; in LibVEX_GuestMIPS32_initialise()
83 vex_state->guest_r12 = 0; in LibVEX_GuestMIPS32_initialise()
84 vex_state->guest_r13 = 0; in LibVEX_GuestMIPS32_initialise()
85 vex_state->guest_r14 = 0; in LibVEX_GuestMIPS32_initialise()
86 vex_state->guest_r15 = 0; in LibVEX_GuestMIPS32_initialise()
87 vex_state->guest_r16 = 0; /* Saved temporaries */ in LibVEX_GuestMIPS32_initialise()
88 vex_state->guest_r17 = 0; in LibVEX_GuestMIPS32_initialise()
89 vex_state->guest_r18 = 0; in LibVEX_GuestMIPS32_initialise()
90 vex_state->guest_r19 = 0; in LibVEX_GuestMIPS32_initialise()
91 vex_state->guest_r20 = 0; in LibVEX_GuestMIPS32_initialise()
92 vex_state->guest_r21 = 0; in LibVEX_GuestMIPS32_initialise()
93 vex_state->guest_r22 = 0; in LibVEX_GuestMIPS32_initialise()
94 vex_state->guest_r23 = 0; in LibVEX_GuestMIPS32_initialise()
95 vex_state->guest_r24 = 0; /* Temporaries */ in LibVEX_GuestMIPS32_initialise()
96 vex_state->guest_r25 = 0; in LibVEX_GuestMIPS32_initialise()
97 vex_state->guest_r26 = 0; /* Reserved for OS kernel */ in LibVEX_GuestMIPS32_initialise()
98 vex_state->guest_r27 = 0; in LibVEX_GuestMIPS32_initialise()
99 vex_state->guest_r28 = 0; /* Global pointer */ in LibVEX_GuestMIPS32_initialise()
100 vex_state->guest_r29 = 0; /* Stack pointer */ in LibVEX_GuestMIPS32_initialise()
101 vex_state->guest_r30 = 0; /* Frame pointer */ in LibVEX_GuestMIPS32_initialise()
102 vex_state->guest_r31 = 0; /* Return address */ in LibVEX_GuestMIPS32_initialise()
103 vex_state->guest_PC = 0; /* Program counter */ in LibVEX_GuestMIPS32_initialise()
104 vex_state->guest_HI = 0; /* Multiply and divide register higher result */ in LibVEX_GuestMIPS32_initialise()
105 vex_state->guest_LO = 0; /* Multiply and divide register lower result */ in LibVEX_GuestMIPS32_initialise()
108 vex_state->guest_f0 = 0x7ff800007ff80000ULL; /* Floting point GP registers */ in LibVEX_GuestMIPS32_initialise()
109 vex_state->guest_f1 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS32_initialise()
110 vex_state->guest_f2 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS32_initialise()
111 vex_state->guest_f3 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS32_initialise()
112 vex_state->guest_f4 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS32_initialise()
113 vex_state->guest_f5 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS32_initialise()
114 vex_state->guest_f6 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS32_initialise()
115 vex_state->guest_f7 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS32_initialise()
116 vex_state->guest_f8 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS32_initialise()
117 vex_state->guest_f9 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS32_initialise()
118 vex_state->guest_f10 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS32_initialise()
119 vex_state->guest_f11 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS32_initialise()
120 vex_state->guest_f12 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS32_initialise()
121 vex_state->guest_f13 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS32_initialise()
122 vex_state->guest_f14 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS32_initialise()
123 vex_state->guest_f15 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS32_initialise()
124 vex_state->guest_f16 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS32_initialise()
125 vex_state->guest_f17 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS32_initialise()
126 vex_state->guest_f18 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS32_initialise()
127 vex_state->guest_f19 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS32_initialise()
128 vex_state->guest_f20 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS32_initialise()
129 vex_state->guest_f21 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS32_initialise()
130 vex_state->guest_f22 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS32_initialise()
131 vex_state->guest_f23 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS32_initialise()
132 vex_state->guest_f24 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS32_initialise()
133 vex_state->guest_f25 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS32_initialise()
134 vex_state->guest_f26 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS32_initialise()
135 vex_state->guest_f27 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS32_initialise()
136 vex_state->guest_f28 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS32_initialise()
137 vex_state->guest_f29 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS32_initialise()
138 vex_state->guest_f30 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS32_initialise()
139 vex_state->guest_f31 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS32_initialise()
141 vex_state->guest_FIR = 0; /* FP implementation and revision register */ in LibVEX_GuestMIPS32_initialise()
142 vex_state->guest_FCCR = 0; /* FP condition codes register */ in LibVEX_GuestMIPS32_initialise()
143 vex_state->guest_FEXR = 0; /* FP exceptions register */ in LibVEX_GuestMIPS32_initialise()
144 vex_state->guest_FENR = 0; /* FP enables register */ in LibVEX_GuestMIPS32_initialise()
145 vex_state->guest_FCSR = 0; /* FP control/status register */ in LibVEX_GuestMIPS32_initialise()
146 vex_state->guest_ULR = 0; /* TLS */ in LibVEX_GuestMIPS32_initialise()
150 vex_state->guest_EMNOTE = 0; in LibVEX_GuestMIPS32_initialise()
153 vex_state->guest_CMSTART = 0; in LibVEX_GuestMIPS32_initialise()
154 vex_state->guest_CMLEN = 0; in LibVEX_GuestMIPS32_initialise()
155 vex_state->host_EvC_COUNTER = 0; in LibVEX_GuestMIPS32_initialise()
156 vex_state->host_EvC_FAILADDR = 0; in LibVEX_GuestMIPS32_initialise()
164 vex_state->guest_NRADDR = 0; in LibVEX_GuestMIPS32_initialise()
166 vex_state->guest_COND = 0; in LibVEX_GuestMIPS32_initialise()
169 vex_state->guest_DSPControl = 0; /* DSPControl register */ in LibVEX_GuestMIPS32_initialise()
170 vex_state->guest_ac0 = 0; /* Accumulator 0 */ in LibVEX_GuestMIPS32_initialise()
171 vex_state->guest_ac1 = 0; /* Accumulator 1 */ in LibVEX_GuestMIPS32_initialise()
172 vex_state->guest_ac2 = 0; /* Accumulator 2 */ in LibVEX_GuestMIPS32_initialise()
173 vex_state->guest_ac3 = 0; /* Accumulator 3 */ in LibVEX_GuestMIPS32_initialise()
176 void LibVEX_GuestMIPS64_initialise ( /*OUT*/ VexGuestMIPS64State * vex_state ) in LibVEX_GuestMIPS64_initialise() argument
178 vex_state->guest_r0 = 0; /* Hardwired to 0 */ in LibVEX_GuestMIPS64_initialise()
179 vex_state->guest_r1 = 0; /* Assembler temporary */ in LibVEX_GuestMIPS64_initialise()
180 vex_state->guest_r2 = 0; /* Values for function returns ... */ in LibVEX_GuestMIPS64_initialise()
181 vex_state->guest_r3 = 0; in LibVEX_GuestMIPS64_initialise()
182 vex_state->guest_r4 = 0; /* Function arguments */ in LibVEX_GuestMIPS64_initialise()
183 vex_state->guest_r5 = 0; in LibVEX_GuestMIPS64_initialise()
184 vex_state->guest_r6 = 0; in LibVEX_GuestMIPS64_initialise()
185 vex_state->guest_r7 = 0; in LibVEX_GuestMIPS64_initialise()
186 vex_state->guest_r8 = 0; in LibVEX_GuestMIPS64_initialise()
187 vex_state->guest_r9 = 0; in LibVEX_GuestMIPS64_initialise()
188 vex_state->guest_r10 = 0; in LibVEX_GuestMIPS64_initialise()
189 vex_state->guest_r11 = 0; in LibVEX_GuestMIPS64_initialise()
190 vex_state->guest_r12 = 0; /* Temporaries */ in LibVEX_GuestMIPS64_initialise()
191 vex_state->guest_r13 = 0; in LibVEX_GuestMIPS64_initialise()
192 vex_state->guest_r14 = 0; in LibVEX_GuestMIPS64_initialise()
193 vex_state->guest_r15 = 0; in LibVEX_GuestMIPS64_initialise()
194 vex_state->guest_r16 = 0; /* Saved temporaries */ in LibVEX_GuestMIPS64_initialise()
195 vex_state->guest_r17 = 0; in LibVEX_GuestMIPS64_initialise()
196 vex_state->guest_r18 = 0; in LibVEX_GuestMIPS64_initialise()
197 vex_state->guest_r19 = 0; in LibVEX_GuestMIPS64_initialise()
198 vex_state->guest_r20 = 0; in LibVEX_GuestMIPS64_initialise()
199 vex_state->guest_r21 = 0; in LibVEX_GuestMIPS64_initialise()
200 vex_state->guest_r22 = 0; in LibVEX_GuestMIPS64_initialise()
201 vex_state->guest_r23 = 0; in LibVEX_GuestMIPS64_initialise()
202 vex_state->guest_r24 = 0; /* Temporaries */ in LibVEX_GuestMIPS64_initialise()
203 vex_state->guest_r25 = 0; in LibVEX_GuestMIPS64_initialise()
204 vex_state->guest_r26 = 0; /* Reserved for OS kernel */ in LibVEX_GuestMIPS64_initialise()
205 vex_state->guest_r27 = 0; in LibVEX_GuestMIPS64_initialise()
206 vex_state->guest_r28 = 0; /* Global pointer */ in LibVEX_GuestMIPS64_initialise()
207 vex_state->guest_r29 = 0; /* Stack pointer */ in LibVEX_GuestMIPS64_initialise()
208 vex_state->guest_r30 = 0; /* Frame pointer */ in LibVEX_GuestMIPS64_initialise()
209 vex_state->guest_r31 = 0; /* Return address */ in LibVEX_GuestMIPS64_initialise()
210 vex_state->guest_PC = 0; /* Program counter */ in LibVEX_GuestMIPS64_initialise()
211 vex_state->guest_HI = 0; /* Multiply and divide register higher result */ in LibVEX_GuestMIPS64_initialise()
212 vex_state->guest_LO = 0; /* Multiply and divide register lower result */ in LibVEX_GuestMIPS64_initialise()
215 vex_state->guest_f0 = 0x7ff800007ff80000ULL; /* Floting point registers */ in LibVEX_GuestMIPS64_initialise()
216 vex_state->guest_f1 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS64_initialise()
217 vex_state->guest_f2 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS64_initialise()
218 vex_state->guest_f3 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS64_initialise()
219 vex_state->guest_f4 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS64_initialise()
220 vex_state->guest_f5 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS64_initialise()
221 vex_state->guest_f6 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS64_initialise()
222 vex_state->guest_f7 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS64_initialise()
223 vex_state->guest_f8 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS64_initialise()
224 vex_state->guest_f9 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS64_initialise()
225 vex_state->guest_f10 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS64_initialise()
226 vex_state->guest_f11 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS64_initialise()
227 vex_state->guest_f12 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS64_initialise()
228 vex_state->guest_f13 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS64_initialise()
229 vex_state->guest_f14 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS64_initialise()
230 vex_state->guest_f15 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS64_initialise()
231 vex_state->guest_f16 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS64_initialise()
232 vex_state->guest_f17 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS64_initialise()
233 vex_state->guest_f18 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS64_initialise()
234 vex_state->guest_f19 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS64_initialise()
235 vex_state->guest_f20 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS64_initialise()
236 vex_state->guest_f21 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS64_initialise()
237 vex_state->guest_f22 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS64_initialise()
238 vex_state->guest_f23 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS64_initialise()
239 vex_state->guest_f24 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS64_initialise()
240 vex_state->guest_f25 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS64_initialise()
241 vex_state->guest_f26 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS64_initialise()
242 vex_state->guest_f27 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS64_initialise()
243 vex_state->guest_f28 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS64_initialise()
244 vex_state->guest_f29 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS64_initialise()
245 vex_state->guest_f30 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS64_initialise()
246 vex_state->guest_f31 = 0x7ff800007ff80000ULL; in LibVEX_GuestMIPS64_initialise()
248 vex_state->guest_FIR = 0; /* FP implementation and revision register */ in LibVEX_GuestMIPS64_initialise()
249 vex_state->guest_FCCR = 0; /* FP condition codes register */ in LibVEX_GuestMIPS64_initialise()
250 vex_state->guest_FEXR = 0; /* FP exceptions register */ in LibVEX_GuestMIPS64_initialise()
251 vex_state->guest_FENR = 0; /* FP enables register */ in LibVEX_GuestMIPS64_initialise()
252 vex_state->guest_FCSR = 0; /* FP control/status register */ in LibVEX_GuestMIPS64_initialise()
254 vex_state->guest_ULR = 0; in LibVEX_GuestMIPS64_initialise()
258 vex_state->guest_EMNOTE = 0; in LibVEX_GuestMIPS64_initialise()
261 vex_state->guest_CMSTART = 0; in LibVEX_GuestMIPS64_initialise()
262 vex_state->guest_CMLEN = 0; in LibVEX_GuestMIPS64_initialise()
263 vex_state->host_EvC_COUNTER = 0; in LibVEX_GuestMIPS64_initialise()
264 vex_state->host_EvC_FAILADDR = 0; in LibVEX_GuestMIPS64_initialise()
272 vex_state->guest_NRADDR = 0; in LibVEX_GuestMIPS64_initialise()
274 vex_state->guest_COND = 0; in LibVEX_GuestMIPS64_initialise()