Lines Matching refs:XA
13015 UChar XA = ifieldRegXA( theInstr ); in dis_vxv_dp_arith() local
13028 assign(frA, unop(Iop_ReinterpI64asF64, unop(Iop_V128HIto64, getVSReg( XA )))); in dis_vxv_dp_arith()
13030 assign(frA2, unop(Iop_ReinterpI64asF64, unop(Iop_V128to64, getVSReg( XA )))); in dis_vxv_dp_arith()
13064 DIP("xv%sdp v%d,v%d,v%d\n", oper_name, (UInt)XT, (UInt)XA, (UInt)XB); in dis_vxv_dp_arith()
13144 (UInt)XT, (UInt)XA, (UInt)XB); in dis_vxv_dp_arith()
13215 DIP("xvtdivdp cr%d,v%d,v%d\n", (UInt)crfD, (UInt)XA, (UInt)XB); in dis_vxv_dp_arith()
13216 assign( frAHi_I64, unop(Iop_V128HIto64, getVSReg( XA )) ); in dis_vxv_dp_arith()
13217 assign( frALo_I64, unop(Iop_V128to64, getVSReg( XA )) ); in dis_vxv_dp_arith()
13258 UChar XA = ifieldRegXA( theInstr ); in dis_vxv_sp_arith() local
13278 DIP("xvaddsp v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB); in dis_vxv_sp_arith()
13281 getVSReg( XA ), getVSReg( XB )) ); in dis_vxv_sp_arith()
13285 DIP("xvmulsp v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB); in dis_vxv_sp_arith()
13288 getVSReg( XA ), getVSReg( XB )) ); in dis_vxv_sp_arith()
13292 DIP("xvsubsp v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB); in dis_vxv_sp_arith()
13295 getVSReg( XA ), getVSReg( XB )) ); in dis_vxv_sp_arith()
13308 DIP("xvdivsp v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB); in dis_vxv_sp_arith()
13309 breakV128to4xF64( getVSReg( XA ), &a3, &a2, &a1, &a0 ); in dis_vxv_sp_arith()
13409 (UInt)XT, (UInt)XA, (UInt)XB); in dis_vxv_sp_arith()
13412 breakV128to4xF64( getVSReg( XA ), &a3, &a2, &a1, &a0 ); in dis_vxv_sp_arith()
13523 DIP("xvtdivsp cr%d,v%d,v%d\n", (UInt)crfD, (UInt)XA, (UInt)XB); in dis_vxv_sp_arith()
13525 breakV128to4x32( getVSReg( XA ), &a3, &a2, &a1, &a0 ); in dis_vxv_sp_arith()
14165 UChar XA = ifieldRegXA( theInstr ); in dis_vxv_misc() local
14185 DIP("%s v%d,v%d v%d\n", isMin ? "xvminsp" : "xvmaxsp", (UInt)XT, (UInt)XA, (UInt)XB); in dis_vxv_misc()
14186 breakV128to4xF64( getVSReg( XA ), &a3, &a2, &a1, &a0 ); in dis_vxv_misc()
14225 UChar XA = ifieldRegXA( theInstr ); in dis_vxv_misc() local
14232 assign(frA, unop(Iop_V128HIto64, getVSReg( XA ))); in dis_vxv_misc()
14234 assign(frA2, unop(Iop_V128to64, getVSReg( XA ))); in dis_vxv_misc()
14236 DIP("%s v%d,v%d v%d\n", isMin ? "xvmindp" : "xvmaxdp", (UInt)XT, (UInt)XA, (UInt)XB); in dis_vxv_misc()
14243 UChar XA = ifieldRegXA( theInstr ); in dis_vxv_misc() local
14248 assign(frA, unop(Iop_V128HIto64, getVSReg( XA ))); in dis_vxv_misc()
14250 assign(frA2, unop(Iop_V128to64, getVSReg( XA ))); in dis_vxv_misc()
14253 DIP("xvcpsgndp v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB); in dis_vxv_misc()
14274 UChar XA = ifieldRegXA( theInstr ); in dis_vxv_misc() local
14282 DIP("xvcpsgnsp v%d,v%d v%d\n",(UInt)XT, (UInt)XA, (UInt)XB); in dis_vxv_misc()
14283 breakV128to4x64U( getVSReg( XA ), &a3_I64, &a2_I64, &a1_I64, &a0_I64 ); in dis_vxv_misc()
14515 UChar XA = ifieldRegXA( theInstr ); in dis_vxs_arith() local
14526 assign(frA, unop(Iop_ReinterpI64asF64, unop(Iop_V128HIto64, getVSReg( XA )))); in dis_vxs_arith()
14535 DIP("xsaddsp v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB); in dis_vxs_arith()
14545 DIP("xssubsp v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB); in dis_vxs_arith()
14555 DIP("xsadddp v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB); in dis_vxs_arith()
14563 DIP("xsdivsp v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB); in dis_vxs_arith()
14573 DIP("xsdivdp v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB); in dis_vxs_arith()
14586 DIP("xsmadd%ssp v%d,v%d,v%d\n", mdp ? "m" : "a", (UInt)XT, (UInt)XA, (UInt)XB); in dis_vxs_arith()
14604 DIP("xsmadd%sdp v%d,v%d,v%d\n", mdp ? "m" : "a", (UInt)XT, (UInt)XA, (UInt)XB); in dis_vxs_arith()
14621 DIP("xsmsub%ssp v%d,v%d,v%d\n", mdp ? "m" : "a", (UInt)XT, (UInt)XA, (UInt)XB); in dis_vxs_arith()
14639 DIP("xsmsub%sdp v%d,v%d,v%d\n", mdp ? "m" : "a", (UInt)XT, (UInt)XA, (UInt)XB); in dis_vxs_arith()
14663 DIP("xsnmadd%sdp v%d,v%d,v%d\n", mdp ? "m" : "a", (UInt)XT, (UInt)XA, (UInt)XB); in dis_vxs_arith()
14683 DIP("xsnmadd%ssp v%d,v%d,v%d\n", mdp ? "m" : "a", (UInt)XT, (UInt)XA, (UInt)XB); in dis_vxs_arith()
14707 DIP("xsnmsub%ssp v%d,v%d,v%d\n", mdp ? "m" : "a", (UInt)XT, (UInt)XA, (UInt)XB); in dis_vxs_arith()
14731 DIP("xsnmsub%sdp v%d,v%d,v%d\n", mdp ? "m" : "a", (UInt)XT, (UInt)XA, (UInt)XB); in dis_vxs_arith()
14747 DIP("xsmulsp v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB); in dis_vxs_arith()
14758 DIP("xsmuldp v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB); in dis_vxs_arith()
14766 DIP("xssubdp v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB); in dis_vxs_arith()
14798 DIP("xstdivdp crf%d,v%d,v%d\n", crfD, (UInt)XA, (UInt)XB); in dis_vxs_arith()
14845 UChar XA = ifieldRegXA ( theInstr ); in dis_vx_cmp() local
14855 assign(frA, unop(Iop_ReinterpI64asF64, unop(Iop_V128HIto64, getVSReg( XA )))); in dis_vx_cmp()
14862 crfD, (UInt)XA, (UInt)XB); in dis_vx_cmp()
14968 UChar XA = ifieldRegXA ( theInstr ); in dis_vvec_cmp() local
14979 assign( vA, getVSReg( XA ) ); in dis_vvec_cmp()
14986 (UInt)XT, (UInt)XA, (UInt)XB); in dis_vvec_cmp()
14994 (UInt)XT, (UInt)XA, (UInt)XB); in dis_vvec_cmp()
15002 (UInt)XT, (UInt)XA, (UInt)XB); in dis_vvec_cmp()
15012 (UInt)XT, (UInt)XA, (UInt)XB); in dis_vvec_cmp()
15026 (UInt)XT, (UInt)XA, (UInt)XB); in dis_vvec_cmp()
15040 (UInt)XT, (UInt)XA, (UInt)XB); in dis_vvec_cmp()
15065 UChar XA = ifieldRegXA ( theInstr ); in dis_vxs_misc() local
15075 assign( vA, getVSReg( XA ) ); in dis_vxs_misc()
15112 DIP("xscpsgndp v%d,v%d v%d\n", (UInt)XT, (UInt)XA, (UInt)XB); in dis_vxs_misc()
15184 DIP("%s v%d,v%d v%d\n", isMin ? "xsmaxdp" : "xsmindp", (UInt)XT, (UInt)XA, (UInt)XB); in dis_vxs_misc()
15310 UChar XA = ifieldRegXA ( theInstr ); in dis_vx_logic() local
15320 assign( vA, getVSReg( XA ) ); in dis_vx_logic()
15325 DIP("xxlxor v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB); in dis_vx_logic()
15329 DIP("xxlor v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB); in dis_vx_logic()
15333 DIP("xxlnor v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB); in dis_vx_logic()
15338 DIP("xxland v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB); in dis_vx_logic()
15342 DIP("xxlandc v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB); in dis_vx_logic()
15347 DIP("xxlorc v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB); in dis_vx_logic()
15353 DIP("xxlnand v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB); in dis_vx_logic()
15359 DIP("xxleqv v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB); in dis_vx_logic()
15623 UChar XA = ifieldRegXA ( theInstr ); in dis_vx_permute_misc() local
15634 assign( vA, getVSReg( XA ) ); in dis_vx_permute_misc()
15650 DIP("xxsldwi v%d,v%d,v%d,%d\n", (UInt)XT, (UInt)XA, (UInt)XB, (UInt)SHW); in dis_vx_permute_misc()
15672 DIP("xxpermdi v%d,v%d,v%d,0x%x\n", (UInt)XT, (UInt)XA, (UInt)XB, (UInt)DM); in dis_vx_permute_misc()
15700 DIP("xxmrg%cw v%d,v%d,v%d\n", type, (UInt)XT, (UInt)XA, (UInt)XB); in dis_vx_permute_misc()
15709 DIP("xxsel v%d,v%d,v%d,v%d\n", (UInt)XT, (UInt)XA, (UInt)XB, (UInt)XC); in dis_vx_permute_misc()